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STM32F407IG Datasheet(PDF) 126 Page - STMicroelectronics |
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STM32F407IG Datasheet(HTML) 126 Page - STMicroelectronics |
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126 / 167 page  Electrical characteristics STM32F405xx, STM32F407xx 126/167 Doc ID 022152 Rev 2 Figure 51. 12-bit buffered /non-buffered DAC 1. The DAC integrates an output buffer that can be used to reduce the output impedance and to drive external loads directly without the use of an external operational amplifier. The buffer can be bypassed by configuring the BOFFx bit in the DAC_CR register. 5.3.25 FSMC characteristics Asynchronous waveforms and timings Figure 52 through Figure 55 represent asynchronous waveforms and Table 71 through Table 74 provide the corresponding timings. The results shown in these tables are obtained with the following FSMC configuration: ● AddressSetupTime = 1 ● AddressHoldTime = 0x1 ● DataSetupTime = 0x1 ● BusTurnAroundDuration = 0x0 In all timing tables, the THCLK is the HCLK clock period. R LOAD C LOAD Buffered/Non-buffered DAC DACx_OUT Buffer(1) 12-bit digital to analog converter ai17157 |
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