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AD9683 Datasheet(PDF) 42 Page - Analog Devices |
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AD9683 Datasheet(HTML) 42 Page - Analog Devices |
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42 / 44 page ![]() AD9683 Data Sheet Rev. 0 | Page 42 of 44 JESD204B LMFC Offset (Address 0x8B) Bits[7:5]—Reserved Bits[4:0]—Local multiframe clock phase offset value These bits are the reset value for the local multiframe clock (LMFC) phase counter when SYSREF± is asserted. These bits are used in applications requiring deterministic delay. JESD204B Preemphasis (Address 0xA8) Bits[7:0]—JESD204B preemphasis enable option These bits enable the preemphasis feature on the JESD204B output drivers. Setting Bits[7:0] to 0x04 disables premphasis, and setting Bits[7:0] to 0x14 enables preemphasis. |
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