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HT24LC256 Datasheet(PDF) 5 Page - Holtek Semiconductor Inc |
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HT24LC256 Datasheet(HTML) 5 Page - Holtek Semiconductor Inc |
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5 / 12 page  Rev. 1.00 5 January 29, 2013 HT24LC256 Read Operations The HT24LC256 device supports three read operations,namely,currentaddressread,random address read and sequential read. During read operationexecution,theread/writeselectbitshould besetto“1”. • Currentaddressread Theinternaldatawordaddresscountermaintains thelastaddressaccessedduringthelastreador writeoperation,incrementedbyone.Thisaddress remainsvalidbetweenoperationsaslongasthe chippowerismaintained.Theaddresswillroll overduringareadfromthelastbyteofthelast memorypagetothefirstbyteofthefirstpage. Theaddresswillrolloverduringawritefrom thelastbyteofthecurrentpagetothefirstbyte ofthesamepage.Oncethedeviceaddresswith theread/writeselectbitsettooneisclockedin andacknowledgedbytheEEPROM,thecurrent addressdatawordisseriallyclockedout.The microcontrollerdoesnotrespondwithaninput zerobutgeneratesafollowingstopcondition(refer toCurrentreadtiming). A2A1 A0 De vi ce add re ss Da ta SD A Li ne Current Address Read Timing • Randomread A random read requires a dummy byte write sequencetoloadinthedatawordaddresswhich is then clocked in and acknowledged by the EEPROM.Themicrocontrollermustthengenerate another start condition.The microcontroller nowinitiatesacurrentaddressreadbysending adeviceaddresswiththeread/writeselectbit high.TheEEPROMacknowledgesthedevice addressandseriallyclocksoutthedataword.The microcontrollershouldrespondwitha“noACK” signal(high)followedbyastopcondition(referto Randomreadtiming). • Sequentialread Sequentialreadsareinitiatedbyeitheracurrent addressreadorarandomaddressread.Afterthe microcontrollerreceivesadataword,itresponds withanacknowledgment.AslongastheEEPROM receivesanacknowledgment,itwillcontinueto incrementthedatawordaddressandseriallyclock outsequentialdatawords.Whenthememory addresslimitisreached,thedatawordaddresswill rolloverandthesequentialreadcontinues.The sequentialreadoperationisterminatedwhenthe microcontrollerdoesnotrespondwithazerobut generatesafollowingstopcondition. De vi ce A ddr es s 1s t, 2nd W or d Ad dr es s (n ) SD A Li ne A2 A1 A0 A2 A1 A0 De vi ce A ddr es s Da ta ( n) Du mmy W ri te No te : *= D on 't c ar e bi ts Random Read Timing SD A Li ne Da ta ( n+ x) Da ta ( n+ 2) Da ta ( n+ 1) Da ta ( n) De vi ce A ddr es s Sequential Read Timing |
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