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ACPL-C780 Datasheet(PDF) 7 Page - AVAGO TECHNOLOGIES LIMITED |
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ACPL-C780 Datasheet(HTML) 7 Page - AVAGO TECHNOLOGIES LIMITED |
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7 / 17 page ![]() 7 AC Electrical Specifications Unless otherwise noted, all typicals and figures are at the nominal operating conditions of VIN+ = 0, VIN– = 0 V, VDD1 = VDD2 = 5 V and TA = 25°C; all Minimum and Maximum specifications are within the Recommended Operating Conditions. Parameter Symbol Min. Typ. Max. Unit Test Conditions Fig. Note Small-Signal Bandwidth (-3 dB) f–3 dB 50 100 kHz VIN+ = 200 mVpk-pk sine wave 12,13 RMS VOUT Noise VN 31.5 mVrms VIN+ = 0 V 13 VIN to VOUT Signal Delay (50 – 10%) tPD10 2.03 3.3 μs VIN+ = 0 to 150 mV step, measured at VOUT node in Figure 15 14,15 VIN to VOUT Signal Delay (50 – 50%) tPD50 3.47 5.6 μs VIN+ = 0 to 150 mV step, measured at VOUT node in Figure 15 14,15 VIN to VOUT Signal Delay (50 – 90%) tPD90 4.99 9.9 μs VIN+ = 0 to 150 mV step, measured at VOUT node in Figure 15 14,15 VOUT Rise/ Fall Time (10 – 90%) tR/F 2.96 6.6 μs VIN+ = 0 to 150 mV step, measured at VOUT node in Figure 15 14,15 Common Mode Transient Immunity CMTI 10 15 kV/ μs VCM = 1 kV, TA = 25°C 16 14 Power Supply Rejection PSR 170 mVrms 15 Package Characteristics Parameter Symbol Min. Typ. Max. Unit Test Condition Fig. Note Input-Output Momentary Withstand Voltage VISO 5000 Vrms RH < 50%, t = 1 min., TA = 25°C 16,17 Resistance (Input-Output) RI-O >1012 Ω VI-O = 500 VDC 18 Capacitance (Input-Output) CI-O 0.5 pF f = 1 MHz 18 |
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