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ACPL-C780 Datasheet(PDF) 16 Page - AVAGO TECHNOLOGIES LIMITED |
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ACPL-C780 Datasheet(HTML) 16 Page - AVAGO TECHNOLOGIES LIMITED |
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16 / 17 page ![]() 16 2.3. Do I really need an RC filter on the input?What is it for? Are other values of R and C okay? The input anti-aliasing filter (R=39 Ω, C=0.01 μF) shown in the typical application circuit is recom- mended for filtering fast switching voltage transients from the input signal. (This helps to attenuate higher signal frequencies which could otherwise alias with the input sampling rate and cause higher input offset voltage.) Some issues to keep in mind using different filter resistors or capacitors are: 1. Filter resistor: Input bias current for pins 2 and 3: This is on the order of 500 nA. If you are using a single filter resistor in series with pin 2 but not pin 3 the IxR drop across this resistor will add to the offset error of the device. As long as this IR drop is small compared to the input offset voltage there should not be a problem. If larger-valued resistors are used in series, it is better to put half of the resistance in series with pin 2 and half the resistance in series with pin 3. In this case, the offset voltage is due mainly to resistor mismatch (typically less than 1% of the resistance design value) multiplied by the input bias. 2. Filter resistor: The equivalent input resistance for ACPL-C78A/C780/C784 is around 500 k Ω. It is therefore best to ensure that the filter resistance is not a significant percentage of this value; otherwise the offset voltage will be increased through the resistor divider effect. [As an example, if Rfilt = 5.5 kΩ, then VOS = (Vin * 1%) = 2 mV for a maximum 200 mV input and VOS will vary with respect to Vin.] 3. The input bandwidth is changed as a result of this different R-C filter configuration. In fact this is one of the main reasons for changing the input-filter R-C time constant. 4. Filter capacitance: The input capacitance of the ACPL-C78A/C780/C784 is approximately 1.5 pF. For proper operation the switching input-side sampling capacitors must be charged from a relatively fixed (low impedance) voltage source. Therefore, if a filter capacitor is used it is best for this capacitor to be a few orders of magnitude greater than the CINPUT (A value of at least 100 pF works well.) 2.4. How do I ensure that the ACPL-C78A/C780/C784 is not destroyed as a result of short circuit conditions which cause voltage drops across the sense resistor that exceed the ratings of the ACPL- C78A/C780/C784’s inputs? Select the sense resistor so that it will have less than 5 V drop when short circuits occur. The only other require- ment is to shut down the drive before the sense resistor is damaged or its solder joints melt. This ensures that the input of the ACPL-C78A/C780/C784 can not be damaged by sense resistors going open-circuit. 3. Isolation and insulation 3.1. How many volts will the ACPL-C78A/C780/C784 withstand? The momentary (1 minute) withstand voltage is 5000 V rms per UL 1577 and CSA Component Acceptance Notice #5. 4. Accuracy 4.1. Can the signal to noise ratio be improved? Yes. Some noise energy exists beyond the 100 kHz bandwidth of the ACPL-C78A/C780/C784. Additional filtering using different filter R,C values in the post-am- plifier application circuit can be used to improve the signal to noise ratio. For example, by using values of R3 = R4 = 10 k Ω, C5=C6=470pFintheapplicationcircuit the rms output noise will be cut roughly by a factor of 2. In applications needing only a few kHz bandwidth even better noise performance can be obtained. The noisespectraldensityisroughly500nV/sqrt(Hz)below 20 kHz (input referred). 4.2. Does the gain change if the internal LED light output degrades with time? No. The LED is used only to transmit a digital pattern. Avago Technologies has accounted for LED degrada- tion in the design of the product to ensure long life. 5. Power supplies and start-up 5.1. What are the output voltages before the input side power supply is turned on? VOUT+ is close to 1.29V andVOUT– is close to 3.80V.This is equivalent to the output response at the condition that LED is completely off. 5.2. How long does the ACPL-C78A/C780/C784 take to begin working properly after power-up? Within 1 ms after VDD1 and VDD2 powered the device starts to work. But it takes longer time for output to settle down completely. In case of the offset mea- surement while both inputs are tied to ground there is initially VOS adjustment (about 60 ms). The output completely settles down in 100 ms after device powering up. 6. Miscellaneous 6.1. How does the ACPL-C78A/C780/C784 measure negative signals with only a +5 V supply? The inputs have a series resistor for protection against large negative inputs. Normal signals are no more than 200 mV in amplitude. Such signals do not forward bias any junctions sufficiently to interfere with accurate operation of the switched capacitor input circuit. |
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