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CY3663 Datasheet(PDF) 21 Page - Cypress Semiconductor

Part # CY3663
Description  EZ-OTG??Programmable USB On-The-Go Host/Peripheral Controller
PDF  92 Pages
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Manufacturer  CYPRESS [Cypress Semiconductor]
Direct Link  http://www.cypress.com
Logo CYPRESS - Cypress Semiconductor

CY3663 Datasheet(HTML) 21 Page - Cypress Semiconductor

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CY7C67200
Document Number: 38-08014 Rev. *I
Page 21 of 92
Register Description
The USB n Control register is used in both host and device mode. It monitors and controls the SIE and the data lines of the USB ports.
This register can be accessed by the HPI interface.
Port A D+ Status (Bit 13)
The Port A D+ Status bit is a read-only bit that indicates the value
of DATA+ on Port A.
1: D+ is high
0: D+ is low
Port A D– Status (Bit 12)
The Port A D– Status bit is a read-only bit that indicates the value
of DATA– on Port A.
1: D– is high
0: D– is low
LOA (Bit 10)
The LOA bit selects the speed of Port A.
1: Port A is set to Low-speed mode
0: Port A is set to Full-speed mode
Mode Select (Bit 9)
The Mode Select bit sets the SIE for host or device operation.
When set for device operation only one USB port is supported.
The active port is selected by the Port Select bit in the Host n
Count Register.
1: Host mode
0: Device mode
Port A Resistors Enable (Bit 7)
The Port A Resistors Enable bit enables or disables the
pull-up/pull-down resistors on Port A. When enabled, the Mode
Select bit and LOA bit of this register sets the pull-up/pull-down
resistors appropriately. When the Mode Select is set for Host
mode, the pull-down resistors on the data lines (D+ and D–) are
enabled. When the Mode Select is set for Device mode, a single
pull-up resistor on either D+ or D–, determined by the LOA bit,
will be enabled. See Table 23 for details.
1: Enable pull-up/pull-down resistors
0: Disable pull-up/pull-down resistors
Port A Force D± State (Bits [4:3])
The Port A Force D± State field controls the forcing state of the
D+ D– data lines for Port A. This field forces the state of the Port
A data lines independent of the Port Select bit setting. See
Table 24 for details.
Suspend Enable (Bit 2)
The Suspend Enable bit enables or disables the suspend feature
on both ports. When suspend is enabled the USB transceivers
are powered down and can not transmit or received USB packets
but can still monitor for a wakeup condition.
1: Enable suspend
0: Disable suspend
Port A SOF/EOP Enable (Bit 0)
The Port A SOF/EOP Enable bit is only applicable in host mode.
In Device mode this bit must be written as ‘0’. In host mode this
bit enables or disables SOFs or EOPs for Port A. Either SOFs or
EOPs will be generated depending on the LOA bit in the USB n
Control Register when Port A is active.
1: Enable SOFs or EOPs
0: Disable SOFs or EOPs
Reserved
All reserved bits must be written as ‘0’.
Table 23. USB Data Line Pull-up and Pull-down Resistors
L0A
Mode
Select
Port n
Resistors
Enable
Function
X
X
0
Pull up/Pull down on D+ and
D– Disabled
X
1
1
Pull down on D+ and D–
Enabled
1
0
1
Pull up on USB D– Enabled
0
0
1
Pull up on USB D+ Enabled
Table 24. Port A Force D± State
Port A Force D± State
Function
MSB
LSB
0
0
Normal Operation
0
1
Force USB Reset, SE0 State
1
0
Force J-State
1
1
Force K-State



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