CY3663 datasheet(30/92 Pages) CYPRESS

30 / 92 page

CY7C67200

Document Number: 38-08014 Rev. *I

Page 30 of 92

Host n SOF/EOP Counter Register [R]

■ Host 1 SOF/EOP Counter Register 0xC094

■ Host 2 SOF/EOP Counter Register 0xC0B4

Figure 28. Host n SOF/EOP Counter Register

The Host n SOF/EOP Counter register contains the current value

of the SOF/EOP down counter. This value can be used to

determine the time remaining in the current frame.

Counter (Bits [13:0])

The Counter field contains the current value of the SOF/EOP

down counter.

Host n Frame Register [R]

■ Host 1 Frame Register 0xC096

■ Host 2 Frame Register 0xC0B6

Figure 29. Host n Frame Register

The Host n Frame register maintains the next frame number to

be transmitted (current frame number + 1). This value is updated

after each SOF transmission. This register resets to 0x0000 after

each CPU write to the Host n SOF/EOP Count register (Host 1:

0xC092, Host 2: 0xC0B2).

Frame (Bits [10:0])

The Frame field contains the next frame number to be trans-

mitted.

Reserved

All reserved bits must be written as ‘0’.

USB Device Only Registers

There are ten sets of USB Device Only registers. All sets consist

of at least two registers, one for Device Port 1 and one for Device

Port 2. In addition, each Device port has eight possible

endpoints. This gives each endpoint register set eight registers

for each Device Port for a total of 16 registers per set. The USB

Device Only registers are covered in this section and summa-

rized in Table 27.

Bit #

Field

Reserved

Counter...

Read/Write

Default

Bit #

Field

...Counter

Read/Write

Default

Bit #

Field

Reserved

Frame...

Read/Write

Default

Bit #

Field

...Frame

Read/Write

Default

Table 27. USB Device Only Registers

Address

(Device 1/Device 2)

R/W

Device n Endpoint n Control Register

0x02n0

R/W

Device n Endpoint n Address Register

0x02n2

R/W

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