ADV7188BSTZ datasheet(7/112 Pages) AD

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ADV7188

Rev. A | Page 7 of 112

THERMAL SPECIFICATIONS

Table 4.

Parameter

Symbol

Test Conditions

Min

Typ

Max

Unit

Junction-to-Case Thermal Resistance

θJC

4-layer PCB with solid ground plane

7.6

°C/W

Junction-to-Ambient Thermal Resistance (Still Air)

θJA

4-layer PCB with solid ground plane

38.1

°C/W

TIMING SPECIFICATIONS

AVDD = 3.15 V to 3.45 V, DVDD = 1.65 V to 2.0 V, DVDDIO = 3.0 V to 3.6 V, PVDD = 1.71 V to 1.89 V (operating temperature range, unless

otherwise noted).

Table 5.

Parameter1, 2

Symbol

Test Conditions

Min

Typ

Max

Unit

SYSTEM CLOCK AND CRYSTAL

Nominal Frequency

28.63636

MHz

Frequency Stability

±50

ppm

I2C PORT

SCLK Frequency

400

kHz

SCLK Minimum Pulse Width High

0.6

μs

SCLK Minimum Pulse Width Low

1.3

μs

Hold Time (Start Condition)

0.6

μs

Setup Time (Start Condition)

0.6

μs

SDA Setup Time

100

SCLK and SDA Rise Time

300

SCLK and SDA Fall Time

300

Setup Time for Stop Condition

0.6

μs

RESET FEATURE

Reset Pulse Width

CLOCK OUTPUTS

LLC1 Mark-Space Ratio

t9:t10

45:55

55:45

% duty cycle

LLC1 Rising to LLC2 Rising

t11

LLC1 Rising to LLC2 Falling

t12

DATA AND CONTROL OUTPUTS

Data Output Transitional Time4

t13

Negative clock edge to start of valid data

(tACCESS = t10 − t13)

3.6

Data Output Transitional Time4

t14

End of valid data to negative clock edge

(tHOLD = t9 + t14)

2.4

Propagation Delay to Hi-Z

t15

Max Output Enable Access Time

t16

Min Output Enable Access Time

t17

1 Temperature range TMIN to TMAX is −40°C to +85°C. The minimum/maximum specifications are guaranteed over this range.

2 Guaranteed by characterization.

3 TTL input values are 0 V to 3 V, with rise/fall times ≤3 ns, measured between the 10% and 90% points.

4 SDP timing figures obtained using default drive strength value (0xD5) in Register 0xF4.

ADV7188BSTZ Datasheet(PDF) 7 Page - Analog Devices

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