RST

GND

PB1

PB2

TS

VCC

1

2

3

6

5

4

RST

GND

PB1

TST

TS

VCC

1

2

3

6

5

4

TPS3420

TPS3421

TPS3422

www.ti.com

SBVS211A – AUGUST 2012 – REVISED MARCH 2013

PIN CONFIGURATION

TPS3420, TPS3421: DRY PACKAGE

TPS3422: DRY PACKAGE

1.45-mm × 1-mm SON

1.45-mm × 1-mm SON

(TOP VIEW)

(TOP VIEW)

PIN DESCRIPTIONS

PIN NO.

PIN

NAME

TPS3420/21

TPS3422

DESCRIPTION

GND

2

2

Ground

PB1

3

3

reset output.

PB2

6

—

assert the reset output.

Active low, open-drain output. Reset is asserted (goes low) when both PB1 and PB2 are

RST

1

1

For TPS3420: Reset is deasserted when either PBx input goes high.

operation, the TS pin state should not be changed because it is intended to be permanently

TS

5

5

connected to either GND or VCC. If switching the TS pin is required, it should be done during

power off, or when either PBx input is high.

TST

—

6

Connect this pin to GND or VCC during normal device operation.

Supply voltage input. Connect a 1.6-V to 6.5-V supply to VCC to power the device. It is good

VCC

4

4

analog design practice to place a 0.1-µF ceramic capacitor close to this pin.

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Product Folder Links: TPS3420 TPS3421 TPS3422