MAX5804 datasheet(18/31 Pages) MAXIM

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MAX5803/MAX5804/MAX5805

Ultra-Small, Single-Channel, 8-/10-/12-Bit Buffered Output

Voltage DACs with Internal Reference and I2C Interface

Maxim Integrated

I2C Broadcast Address

A broadcast address is provided for the purpose of

updating or configuring all MAX5803/MAX5804/MAX5805

devices on a given I2C bus. All MAX5803/MAX5804/

MAX5805 devices acknowledge and respond to the

broadcast device address 00110010. The broadcast

mode is intended for use in write mode only (as indicated

by R/W = 0 in the address given).

I2C Acknowledge

In write mode, the acknowledge bit (ACK) is a clocked

9th bit that the MAX5803/MAX5804/MAX5805 use to

handshake receipt of each byte of data as shown in

Figure 3. The MAX5803/MAX5804/MAX5805 pull down

SDA during the entire master-generated 9th clock pulse

if the previous byte is successfully received. Monitoring

ACK allows for detection of unsuccessful data transfers.

An unsuccessful data transfer occurs if a receiving

device is busy or if a system fault has occurred. In the

event of an unsuccessful data transfer, the bus master

will retry communication.

In read mode, the master pulls down SDA during the

9th clock cycle to acknowledge receipt of data from the

MAX5803/MAX5804/MAX5805. An acknowledge is sent

by the master after each read byte to allow data transfer

to continue. A not-acknowledge is sent when the master

reads the final byte of data from the MAX5803/MAX5804/

MAX5805, followed by a STOP condition.

I2C Command Byte and Data Bytes

A command byte follows the slave address. A command

byte is typically followed by two data bytes unless it

is the last byte in the transmission. If data bytes follow

the command byte, the command byte indicates the

address of the register that is to receive the following

two data bytes. The data bytes are stored in a temporary

during the ACK periods between bytes. This avoids any

glitching or digital feedthrough to the DAC while the

interface is active.

I2C Write Operations

A master device communicates with the MAX5803/

MAX5804/MAX5805 by transmitting the proper slave

address followed by command and data words. Each

transmit sequence is framed by a START or Repeated

START condition and a STOP condition as described

above. Each word is 8 bits long and is always followed

by an acknowledge clock (ACK) pulse as shown in

Figure 4 and Figure 5. The first byte contains the address

of the MAX5803/MAX5804/MAX5805 with R/W = 0 to

indicate a write. The second byte contains the register

(or command) to be written and the third and fourth bytes

contain the data to be written. By repeating the register

address plus data pairs (Byte #2 through Byte #4 in

Figure 4 and Figure 5), the user can perform multiple

There is no limit as to how many registers the user can

write with a single command. The MAX5803/MAX5804/

MAX5805 support this capability for all user-accessible

write mode commands.

Combined Format I2C Readback Operations

Each readback sequence is framed by a START or

Repeated START condition and a STOP condition. Each

word is 8 bits long and is followed by an acknowledge

clock pulse as shown in Figure 6. The first byte contains

the address of the MAX5803/MAX5804/MAX5805 with

R/W = 0 to indicate a write. The second byte contains

the register that is to be read back. There is a Repeated

START condition, followed by the device address with

R/W = 1 to indicate a read and an acknowledge clock.

The master has control of the SCL line but the MAX5803/

MAX5804/MAX5805 take over the SDA line. The final two

bytes in the frame contain the register data readback

followed by a STOP condition. If additional bytes beyond

those required to readback the requested data are

provided, the MAX5803/MAX5804/MAX5805 will continue

to readback ones. Readback of the RETURN register

is supported for the RETURN command (B[23:20] =

0111). Readback of the CODE register is supported for

the CODE command (B[23:20] = 1000). Readback of

the DAC register is supported for all LOAD commands

(B[23:20] = 1001, 1010, or 1011).

Figure 3. I2C Acknowledge

SCL

START

CONDITION

SDA

CLOCK PULSE

FOR

ACKNOWLEDGMENT

ACKNOWLEDGE

NOT ACKNOWLEDGE

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