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FDMS8026S Datasheet(PDF) 4 Page - List of Unclassifed Manufacturers

Part # FDMS8026S
Description  Advanced package and Silicon combination for low rDS(on) and high efficiency
PDF  8 Pages
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Manufacturer  ETC2 [List of Unclassifed Manufacturers]
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FDMS8026S Datasheet(HTML) 4 Page - List of Unclassifed Manufacturers

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www.fairchildsemi.com
4
©2010 Fairchild Semiconductor Corporation
FDMS8026S Rev.C1
Figure 7.
0
5
10
15
20
25
30
0
2
4
6
8
10
ID = 19 A
VDD = 20 V
VDD = 10 V
Qg, GATE CHARGE (nC)
VDD = 15 V
Gate Charge Characteristics
Figure 8.
0.1
1
10
40
100
1000
3000
f = 1 MHz
VGS = 0 V
VDS, DRAIN TO SOURCE VOLTAGE (V)
Crss
Coss
Ciss
30
Capacitance vs Drain
to Source Voltage
Figure9.
0.001
0.01
0.1
1
10
40
1
10
40
TJ = 100 oC
TJ = 25 oC
TJ = 125 oC
t
AV, TIME IN AVALANCHE (ms)
UnclampedInductive
Switching Capability
Figure 10.
25
50
75
100
125
150
0
20
40
60
80
100
VGS = 4.5 V
Limited by Package
RθJC = 3.0
o
C/W
VGS = 10 V
T
C,
CASE TEMPERATURE
(
o
C
)
Maximum Continuous Drain
Current vs Case Temperature
Figure 11. Forward Bias Safe
Operating Area
0.01
0.1
1
10
100200
0.01
0.1
1
10
100
200
1 s
100 μs
10 ms
DC
10 s
100 ms
1 ms
VDS, DRAIN to SOURCE VOLTAGE (V)
THIS AREA IS
LIMITED BY r
DS(on)
SINGLE PULSE
TJ = MAX RATED
RθJA = 125
oC/W
TA = 25
oC
Figure 12.
10
-4
10
-3
10
-2
10
-1
110
100
1000
0.5
1
10
100
1000
2000
SINGLE PULSE
RθJA = 125
oC/W
TA = 25
oC
t, PULSE WIDTH (sec)
Single Pulse Maximum
Power Dissipation
Typical Characteristics T
J = 25°C unless otherwise noted



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