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M68HC08 Datasheet(PDF) 135 Page - Freescale Semiconductor, Inc

Part # M68HC08
Description  MC68HC908JB16 Technical Data
PDF  332 Pages
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Manufacturer  FREESCALE [Freescale Semiconductor, Inc]
Direct Link  http://www.freescale.com
Logo FREESCALE - Freescale Semiconductor, Inc

M68HC08 Datasheet(HTML) 135 Page - Freescale Semiconductor, Inc

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Monitor ROM (MON)
MC68HC908JB16 — Rev. 1.1
Technical Data
Freescale Semiconductor
Monitor ROM (MON)
135
9.5 Security
A security feature discourages unauthorized reading of FLASH locations
while in monitor mode. The host can bypass the security feature at
monitor mode entry by sending eight security bytes that match the bytes
at locations $FFF6–$FFFD. Locations $FFF6–$FFFD contain user-
defined data.
NOTE:
Do not leave locations $FFF6–$FFFD blank. For security reasons,
program locations $FFF6–$FFFD.
During monitor mode entry, the MCU waits after the power-on reset for
the host to send the eight security bytes on pin PTA0. If the received
bytes match those at locations $FFF6–$FFFD, the host bypasses the
security feature and can read all FLASH locations and execute code
from FLASH. Security remains bypassed until a power-on or an LVI
reset occurs. If the reset was not a power-on or an LVI reset, security
remains bypassed and security code entry is not required.
(See Figure 9-8.)
Figure 9-8. Monitor Mode Entry Timing
PTA0
RST
VDD
4096 + 32 OSCDCLK CYCLES
256 BUS CYCLES (MINIMUM)
1
4
1
1
2
1
NOTES:
2 = Data return delay, 2 bit times.
4 = Wait 1 bit time before sending next byte.
4
FROM HOST
FROM MCU
1 = Echo delay, 2 bit times.



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