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M68HC08 Datasheet(PDF) 138 Page - Freescale Semiconductor, Inc |
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M68HC08 Datasheet(HTML) 138 Page - Freescale Semiconductor, Inc |
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138 / 332 page ![]() Timer Interface Module (TIM) Technical Data MC68HC908JB16 — Rev. 1.1 138 Timer Interface Module (TIM) Freescale Semiconductor 10.2 Introduction This section describes the timer interface (TIM) module. The TIM is a two-channel timer that provides a timing reference with input capture, output compare, and pulse-width-modulation functions. Figure 10-1 is a block diagram of the TIM. This particular MCU has two timer interface modules which are denoted as TIM1 and TIM2. NOTE: TIM1 and TIM2 each have channel 0 and channel 1 I/Os connected together, forming a common I/O. Because of this common I/O, both channels should not be simultaneously configured for output compare functions, otherwise, port pin contention will occur. 10.3 Features Features of the TIM include: • Two input capture/output compare channels on one common I/O: – Rising-edge, falling-edge, or any-edge input capture trigger – Set, clear, or toggle output compare action • Buffered and unbuffered pulse-width-modulation (PWM) signal generation • Programmable TIM clock input – 7-frequency internal bus clock prescaler selection – External TIM clock input (bus frequency ÷2 maximum) • Free-running or modulo up-count operation • Toggle any channel pin on overflow • TIM counter stop and reset bits |
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