AD7150 datasheet(16/28 Pages) AD

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AD7150

Rev. 0 | Page 16 of 28

DATA REGISTERS

Ch1 Address Pointer 0x01, 0x02

Ch2 Address Pointer 0x03,0x04

16 Bits, Read-Only, Default Value 0x0000

Data from the last complete capacitance-to-digital conversion

reflects the capacitance on the input. Only the 12 MSBs (most

significant bits) of the data registers are used for the CDC

result. The 4 LSBs (least significant bits) are always 0, as shown

in Figure 36.

BIT 7 BIT 6 BIT 5 BIT 4 BIT 3 BIT 2

12-BIT CDC RESULT

BIT 1 BIT 0 BIT 7 BIT 6 BIT 5 BIT 4 BIT 3 BIT 2

DATA HIGH

MSB

DATA LOW

LSB

BIT 1 BIT 0

Figure 36. CDC Data Register

The nominal AD7150 CDC transfer function (an ideal transfer

function excluding offset and/or gain error) maps the input

capacitance between zero scale and full scale to output data

codes between 0x3000 and 0xCFF0 only (see Table 8).

Table 8. AD7150 Capacitance-to-Data Mapping

Data

Input Capacitance

0x0000

Not valid, underrange

0x3000

Zero-scale (0 pF)

0x8000

Mid-scale (+1 pF)

0xCFF0

Full-scale (+2 pF)

0xFFF0

Not valid, overrange

The input capacitance can be calculated from the output data

using the following equation:

Range

Input

Data

40944

12288

)

(

−

where Input_Range = 4 pF, 2 pF, 1 pF, or 0.5 pF.

The following is the same equation written with hexadecimal

numbers:

Range

Input

Data

3000

)

(

−

A data register is updated after a finished conversion on the

capacitive channel, with one exception: when the serial interface

read operation from the data register is in progress, the data

result is lost.

The stop condition on the serial interface is considered to be the

end of the read operation. Therefore, to prevent incorrect data

reading through the serial interface, the two bytes of a data

pointer auto-increment feature of the serial interface.

AVERAGE REGISTERS

Ch1 Address Pointer 0x05, 0x06

Ch2 Address Pointer 0x07,0x08

16 Bits, Read-Only, Default Value 0x0000

These registers show the average calculated from the previous

CDC data. The 12-bit CDC result corresponds to the 12 MSBs

of the average register.

The settling time of the average can be set by programming the

ThrSettling bits in the setup registers. The average register is

overwritten directly with the CDC output data, that is, the

history is forgotten if the timeout is enabled and elapses.

FIXED THRESHOLD REGISTERS

Ch1 Address Pointer 0x09, 0x0A

Ch2 Address Pointer 0x0C,0x0D

16 Bits, Read/Write, Factory Preset 0x0886

A constant threshold for the output comparator in the fixed

threshold mode can be set using these registers. The 12-bit

CDC result corresponds to the 12 MSBs of the threshold

and location on-chip with the sensitivity and timeout registers.

The fixed threshold registers are not accessible in the adaptive

threshold mode.

SENSITIVITY REGISTERS

Ch1 Address Pointer 0x09

Ch2 Address Pointer 0x0C

8 Bits, Read/Write, Factory Preset 0x08

Sensitivity registers set the distance of the positive threshold above

the data average, and the distance of the negative threshold below

the data average, in the adaptive threshold mode.

NEGATIVE

THRESHOLD

POSITIVE

THRESHOLD

DATA AVERAGE

OUTPUT ACTIVE

TIME

SENSITIVITY

DATA

SENSITIVITY

Figure 37. Threshold Sensitivity

The sensitivity is an 8-bit value and is mapped to the lower eight

bits of the 12-bit CDC data, that is, it corresponds to the 16-bit

data register as shown in Figure 38.

BIT 7 BIT 6 BIT 5 BIT 4 BIT 3

SENSITIVITY

BIT 2 BIT 1 BIT 0

BIT 7 BIT 6 BIT 5 BIT 4 BIT 3 BIT 2

12-BIT CDC RESULT

BIT 1 BIT 0 BIT 7 BIT 6 BIT 5 BIT 4 BIT 3 BIT 2

DATA HIGH

DATA LOW

BIT 1 BIT 0

Figure 38. Relation Between Sensitivity Register and CDC Data Register

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