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EP3SE110 Datasheet(PDF) 308 Page - Altera Corporation

Part # EP3SE110
Description  Stratix III Device Handbook
PDF  341 Pages
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Manufacturer  ALTERA [Altera Corporation]
Direct Link  http://www.altera.com
Logo ALTERA - Altera Corporation

EP3SE110 Datasheet(HTML) 308 Page - Altera Corporation

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1–298
Chapter 1: Stratix III Device Datasheet: DC and Switching Characteristics
I/O Timing
Stratix III Device Handbook, Volume 2
© July 2010
Altera Corporation
Table 1–135 through Table 1–138 list the maximum I/O timing parameters for
EP3SE260 devices for differential I/O standards.
Table 1–135 lists the EP3SE260 column pins input timing parameters for differential
I/O standards.
1.2-V
HSTL
CLASS I
4mA
GCLK
tco
3.478
3.726
5.501 5.718 6.296 6.118 6.538 5.883 6.420 6.118 6.538
ns
GCLK
PLL
t
co
1.379
1.586
2.036 2.128 2.323 2.308 2.266 2.231 2.457 2.308 2.266
ns
6mA
GCLK
t
co
3.466
3.714
5.490 5.706 6.284 6.109 6.529 5.872 6.411 6.109 6.529
ns
GCLK
PLL
tco
1.367
1.578
2.027 2.119 2.314 2.296 2.254 2.220 2.448 2.296 2.254
ns
8mA
GCLK
t
co
3.463
3.712
5.494 5.711 6.290 6.118 6.538 5.878 6.421 6.118 6.538
ns
GCLK
PLL
t
co
1.364
1.578
2.034 2.127 2.323 2.302 2.260 2.226 2.458 2.302 2.260
ns
3.0-V PCI
—
GCLK
t
co
3.542
3.812
5.520 5.723 6.294 6.113 6.564 5.875 6.437 6.113 6.564
ns
GCLK
PLL
t
co
1.476
1.661
2.049 2.137 2.343 2.368 2.264 2.253 2.476 2.368 2.264
ns
3.0-V
PCI-X
—
GCLK
tco
3.542
3.812
5.520 5.723 6.294 6.113 6.564 5.875 6.437 6.113 6.564
ns
GCLK
PLL
t
co
1.476
1.661
2.049 2.137 2.343 2.368 2.264 2.253 2.476 2.368 2.264
ns
Table 1–134. EP3SE260 Row Pins Output Timing Parameters (Part 5 of 5)
I/O
Standard
Clock
Fast Model
C2
C3
C4
C4L
I3
I4
I4L
Units
Industrial
Commercial
V
CCL=
1.1 V
V
CCL=
1.1 V
V
CCL=
1.1 V
V
CCL=
1.1 V
V
CCL=
0.9 V
V
CCL=
1.1 V
V
CCL=
1.1 V
V
CCL=
1.1 V
V
CCL=
0.9 V
Table 1–135. EP3SE260 Column Pins Input Timing Parameters (Part 1 of 3)
I/O Standard
Clock
Fast Model
C2
C3
C4
C4L
I3
I4
I4L
Units
Industrial
Commercial
V
CCL=
1.1 V
V
CCL=
1.1 V
V
CCL=
1.1 V
V
CCL=
1.1 V
V
CCL=
0.9 V
V
CCL=
1.1 V
V
CCL=
1.1 V
V
CCL=
1.1 V
V
CCL=
0.9 V
LVDS
GCLK
t
su
-1.153
-1.221
-1.879
-1.911
-2.067
-1.987
-2.459 -1.928 -2.084 -1.987
-2.459
ns
t
h
1.289
1.376
2.114
2.150
2.330
2.237
2.711
2.177
2.355
2.237
2.711
ns
GCLK
PLL
t
su
1.103
1.122
1.882
1.986
2.207
2.099
2.096
1.998
2.217
2.099
2.096
ns
t
h
-0.824
-0.821
-1.403
-1.493
-1.659
-1.580
-1.562 -1.493 -1.659 -1.580
-1.562
ns
MINI-LVDS
GCLK
t
su
-1.153
-1.221
-1.879
-1.911
-2.067
-1.987
-2.459 -1.928 -2.084 -1.987
-2.459
ns
t
h
1.289
1.376
2.114
2.150
2.330
2.237
2.711
2.177
2.355
2.237
2.711
ns
GCLK
PLL
tsu
1.103
1.122
1.882
1.986
2.207
2.099
2.096
1.998
2.217
2.099
2.096
ns
t
h
-0.824
-0.821
-1.403
-1.493
-1.659
-1.580
-1.562 -1.493 -1.659 -1.580
-1.562
ns
RSDS
GCLK
t
su
-1.161
-1.233
-1.889
-1.922
-2.083
-2.003
-2.475 -1.939 -2.099 -2.003
-2.475
ns
t
h
1.297
1.388
2.124
2.161
2.346
2.253
2.727
2.188
2.370
2.253
2.727
ns
GCLK
PLL
t
su
1.095
1.110
1.872
1.975
2.191
2.083
2.080
1.987
2.202
2.083
2.080
ns
th
-0.816
-0.809
-1.393
-1.482
-1.643
-1.564
-1.546 -1.482 -1.644 -1.564
-1.546
ns
DIFFERENTIAL
1.2-V HSTL
CLASS I
GCLK
t
su
-1.161
-1.233
-1.889
-1.922
-2.083
-2.003
-2.475 -1.939 -2.099 -2.003
-2.475
ns
t
h
1.297
1.388
2.124
2.161
2.346
2.253
2.727
2.188
2.370
2.253
2.727
ns
GCLK
PLL
t
su
1.095
1.110
1.872
1.975
2.191
2.083
2.080
1.987
2.202
2.083
2.080
ns
t
h
-0.816
-0.809
-1.393
-1.482
-1.643
-1.564
-1.546 -1.482 -1.644 -1.564
-1.546
ns



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