RSTn

TCAL

WAKE

DONE

INT. OSC.

PGOOD

A

B

C

D

TPL5000

www.ti.com

SNAS628A – JULY 2013 – REVISED JULY 2013

Figure 4. Timing PGOOD, WAKE, RSTn, TCAL

Watchdog Feature

Most of the µC based systems need to be self-reliant; if the software hangs for any reason, the µC must be

reset. The TPL5000 can provide this functionality by connecting a µC programmable output pin to the DONE

input pin. If the DONE line does not toggle within the selected delay period, then the µC is not operating properly

and must be reset.

The TPL5000 recognizes a valid DONE signal as a low to high transition; if two DONE signlas are received

within the delay period the second signal is ignored.

In the TPL5000, the watchdog window and the delay period are equivalent. A valid "DONE" signal resets the

watchdog counter only, and not the delay time counter. A PGOOD low to high transition clears both the

watchdog and delay time counters.

Figure 5 shows the watchdog feature of the TPL5000. The sequence A, B, C is a standard sequence with the µC

working properly. In this normal sequence, the µC sends a valid "DONE" (arrow B) before the end of the delay

period. The sequence C, D ,E is an anomalous sequence in which the µC is not in a valid state, and it does not

send the DONE signal (dashed pulse) before the end of the delay period. The TPL5000 determines the µC is

hung and sends a RESET signal (arrow E) when the period delay has elapsed.

Supervisor Feature

A critical event that can corrupt the memory of a µC is a voltage supply drop (supply lower than minimum

operating range), and a reset of the µC is mandatory if this occurs. Since the TPL5000 is the right choice in

systems which stay most of the time in deep sleep, due to its ultra low power consumption, it is fundamental that

it takes into account the voltage drop events.

The TPL5000 implements a supervisory functionality when working with some power management ICs which

indicate the status of the supply voltage with a power good or battery good output. The supervisory functionality

is enabled by simply connecting the Battery management power good output to the TPL5000 PGOOD pin. If this

feature is not used connect the PGOOD pin to VDD.

In case the power management IC detects a voltage drop, lowering the PGOOD line, while the µC is in deep

sleep mode (in which internal supervisors are usually off), the TPL5000 internally latches that event, and when

the PGOOD returns to high, it sends out a RESET signal to the µC at the end of the elapsed delay period.

Copyright © 2013, Texas Instruments Incorporated

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