ADV212 datasheet(3/44 Pages) AD

3 / 44 page

ADV212

Rev. B | Page 3 of 44

The ADV212 can process images at a rate of 40 MSPS in

reversible mode and at higher rates when used in irreversible

mode. The ADV212 contains a dedicated wavelet transform

engine, three entropy CODECs, an on-board memory system,

and an embedded reduced instruction set computer (RISC)

processor that can provide a complete JPEG2000 compression/

decompression solution.

The wavelet processor supports the 9/7 irreversible wavelet

transform and the 5/3 wavelet transform in reversible and

irreversible modes. The entropy CODECs support all features

in the JPEG2000 Part 1 specification except maximum shift

region of interest (ROI).

The ADV212 operates on a rectangular array of pixel samples

called a tile. A tile can contain a complete image, up to the

maximum supported size, or some portion of an image. The

maximum horizontal tile size supported depends on the wavelet

transform selected and the number of samples in the tile.

Images larger than the ADV212 maximum tile size can be

broken into individual tiles and then sent sequentially to the

chip while maintaining a single, fully compliant JPEG2000 code

stream for the entire image.

JPEG2000 FEATURE SUPPORT

The ADV212 supports a broad set of features that are included

in Part 1 of the JPEG2000 standard (ISO/IEC 15444).

Depending on the particular application requirements, the

ADV212 can provide varying levels of JPEG2000 compression

support. It can provide raw code block and attribute data

output, which allows the host software to have complete control

over generation of the JPEG2000 code stream and other aspects

of the compression process such as bit-rate control.

Additionally, the ADV212 can create a complete, fully

compliant JPEG2000 code stream (J2C) and enhanced file

formats such as JP2.

FUNCTIONAL BLOCK DIAGRAM

PIXEL I/F

EXTERNAL

DMA CTRL

WAVELET

ENGINE

INTERNAL BUS AND DMA ENGINE

PIXEL I/F

EC1

EC2

EC3

EMBEDDED

RISC

PROCESSOR

SYSTEM

RAM

ROM

ADV212

CODE FIFO

PIXEL FIFO

ATTR FIFO

HOST I/F

Figure 1.

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