2

S1C60N08/60R08

q Event counter .................................. Two 8-bit inputs (dial input evaluation or independent)

q Sound generator ............................. Programmable in 8 sounds (8 frequencies)

Digital envelope built-in (

∗1)

q Analog comparator.......................... Inverted input

× 1, non-inverted input × 1

q Battery low detection circuit (BLD) .. Dual system (programmable in 8 values and a fixed value)

2.4 V, 2.2–2.55 V

...S1C60N08/60A08/60R08

1.2 V, 1.05–1.4 V

...S1C60L08

q External interrupt ............................ Input interrupt:

3 systems

q Internal interrupt .............................. Time base counter interrupt:

2 systems

Serial interface interrupt:

1 system

q Supply voltage ................................ 3.0 V (1.8–3.5 V)

...S1C60N08/60A08/60R08

1.5 V (0.9–1.7 V)

...S1C60L08

q Current consumption ...................... S1C60N08

Halt state: 1.0 µA when CLK = 32.768 kHz (Typ.)

Run state: 2.2 µA when CLK = 32.768 kHz (Typ.)

S1C60L08

Halt state: 1.0 µA when CLK = 32.768 kHz (Typ.)

Run state: 2.2 µA when CLK = 32.768 kHz (Typ.)

S1C60A08

Halt state: 1.1 µA when CLK = 32.768 kHz (Typ.)

Run state: 3.0 µA when CLK = 32.768 kHz (Typ.)

Run state: 50 µA when CLK = 500 kHz (Typ.)

S1C60R08

q Package .......................................... QFP5-100pin, QFP15-100pin (plastic) or chip

∗1: Can be selected with mask option