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M24128-DF Datasheet(PDF) 30 Page - STMicroelectronics

Part # M24128-DF
Description  128-Kbit serial I²C bus EEPROM
PDF  40 Pages
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Manufacturer  STMICROELECTRONICS [STMicroelectronics]
Direct Link  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

M24128-DF Datasheet(HTML) 30 Page - STMicroelectronics

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DC and AC parameters
M24128-BW M24128-BR M24128-BF M24128-DF
30/40
DocID16892 Rev 23
Table 18. 1 MHz AC characteristics
Symbol
Alt.
Parameter(1)
1. Only for M24128 devices identified by the process letter K.
Min.
Max.
Unit
fC
fSCL
Clock frequency
0
1
MHz
tCHCL
tHIGH
Clock pulse width high
260
-
ns
tCLCH
tLOW
Clock pulse width low
500
-
ns
tXH1XH2
tR
Input signal rise time
(2)
2. There is no min. or max. values for the input signal rise and fall times. It is however
recommended by the I²C specification that the input signal rise and fall times be less than
120 ns when fC < 1 MHz.
(2)
ns
tXL1XL2
tF
Input signal fall time
(2)
(2)
ns
tQL1QL2(3)
3. Characterized only, not tested in production.
tF
SDA (out) fall time
20(4)
4. With CL = 10 pF.
120
ns
tDXCX
tSU:DAT Data in setup time
50
-
ns
tCLDX
tHD:DAT Data in hold time
0
-
ns
tCLQX(5)
5. To avoid spurious Start and Stop conditions, a minimum delay is placed between SCL=1 and
the falling or rising edge of SDA.
tDH
Data out hold time
100
-
ns
tCLQV(6)
6. tCLQV is the time (from the falling edge of SCL) required by the SDA bus line to reach either
0.3 VCC or 0.7 VCC, assuming that the Rbus × Cbus time constant is within the values specified
in Figure 12.
tAA
Clock low to next data valid (access time)
-
450
ns
tCHDL
tSU:STA Start condition setup time
250
-
ns
tDLCL
tHD:STA Start condition hold time
250
-
ns
tCHDH
tSU:STO Stop condition setup time
250
-
ns
tDHDL
tBUF
Time between Stop condition and next Start
condition
500
-
ns
tWLDL(7)(3)
7. WC=0 set up time condition to enable the execution of a WRITE command.
tSU:WC WC set up time (before the Start condition)
0
-
µs
tDHWH(8)(3)
8. WC=0 hold time condition to enable the execution of a WRITE command.
tHD:WC WC hold time (after the Stop condition)
1
-
µs
tW
tWR
Write time
-
5
ms
tNS(3)
Pulse width ignored (input filter on SCL and
SDA)
-80
ns



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