DOC8228 datasheet(14/20 Pages) ETC1

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Specifications

ZigBit™ 2.4 GHz Amplified Wireless Modules

3-11

8228B–MCU Wireless–06/09

Table 3-6. Pin descriptions

Connector

Pin Name

Description

I/O

Default

State after

Power on

SPI_CLK

Reserved for stack operation

(4)

SPI_MISO

Reserved for stack operation

(4)

I/O

SPI_MOSI

Reserved for stack operation

(4)

I/O

GPIO0

General Purpose digital Input/Output 0

(2)(3)(4)(7)

I/O

tri-state

GPIO1

General Purpose digital Input/Output 1

(2)(3)(4)(7)

I/O

tri-state

GPIO2

General Purpose digital Input/Output 2

(2)(3)(4)(7)

I/O

tri-state

OSC32K_OUT

32.768 kHz clock output

(4)(5)

RESET

Reset input (active low)

(4)

9,22,23

DGND

Digital Ground

CPU_CLK

RF clock output. When module is in active state, 4

MHz signal is present on this line. While module is

in the sleeping state, clock generation is also

stopped

(4).

I2C_CLK

I2C Serial clock output

(2)(3)(4)(7)

tri-state

I2C_DATA

I2C Serial data input/output

(2)(3)(4)(7)

I/O

tri-state

UART_TXD

UART receive input

(1)(2)(3)(4)(7)

tri-state

UART_RXD

UART transmit output

(1)(2)(3)(4)(7)

tri-state

UART_RTS

RTS input (Request to send) for UART hardware

flow control. Active low

(2)(3)(4)(7)

tri-state

UART_CTS

CTS output (Clear to send) for UART hardware

flow control. Active low

(2)(3)(4)(7)(8)

tri-state

GPIO6

General Purpose digital Input/Output 6

(2)(3)(4)(7)

I/O

tri-state

GPIO7

General Purpose digital Input/Output 7

(2)(3)(4)(7)

I/O

tri-state

GPIO3

General Purpose digital Input/Output 3

(2)(3)(4)(7)

I/O

tri-state

GPIO4

General Purpose digital Input/Output 4

(2)(3)(4)(7)

I/O

tri-state

GPIO5

General Purpose digital Input/Output 5

(2)(3)(4)(7)

I/O

tri-state

24,25

D_VCC

Digital Supply Voltage (V

CC)

(9)

JTAG_TMS

JTAG Test Mode Select

(2)(3)(4)(6)

JTAG_TDI

JTAG Test Data Input

(2)(3)(4)(6)

JTAG_TDO

JTAG Test Data Output

(2)(3)(4)(6)

JTAG_TCK

JTAG Test Clock

(2)(3)(4)(6)

ADC_INPUT_3

ADC Input Channel 3

(2)(3)(7)

tri-state

ADC_INPUT_2

ADC Input Channel 2

(2)(3)(7)

tri-state

ADC_INPUT_1

ADC Input Channel 1

(2)(3)(7)

tri-state

BAT

ADC Input Channel 0, used for battery level

measurement. This pin equals VCC/3.

(2)(3)(7)

tri-state

A_VREF

Input/Output reference voltage for ADC

I/O

tri-state

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