AD9523 datasheet(27/60 Pages) AD

Part #	AD9523

Description	Jitter Cleaner and Clock Generator with 14 Differential or 29 LVCMOS Outputs

PDF	60 Pages

Scroll/Zoom	100%

Manufacturer	AD [Analog Devices]

Direct Link	http://www.analog.com

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27 / 60 page

Data Sheet

AD9523

Rev. C | Page 27 of 60

Reset to Settings in EEPROM when EEPROM Pin = 0 via the

Serial Port

The serial port control register allows the chip to be reset to settings

in EEPROM when the EEPROM pin = 1 via Register 0xB02, Bit 1.

This bit is self-clearing. This bit does not have any effect when the

EEPROM pin = 0. It takes ~40 ms for the outputs to begin toggling

after the Soft_EEPROM register is cleared.

POWER-DOWN MODE

Chip Power-Down via PD

Place the AD9523 into a power-down mode by pulling the PD pin

low. Power-down turns off most of the functions and currents

inside the AD9523. The chip remains in this power-down state

until PD is returned to a logic high state. When taken out of power-

down mode, the AD9523 returns to the settings programmed into

its registers prior to the power-down, unless the registers are

changed by new programming while the PD pin is held low.

AD9523 Datasheet(PDF) 27 Page - Analog Devices