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AM3703CUS Datasheet(PDF) 268 Page - Texas Instruments |
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AM3703CUS Datasheet(HTML) 268 Page - Texas Instruments |
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268 / 280 page  jtag_tck jtag_rtck jtag_tdi jtag_tms_tmsc jtag_emux(IN) jtag_tdo jtag_emux(OUT) JT7 JT11 JT1 JT2 JT3 JT8 JT10 JT9 JT4 JT5 JT6 JT12 JT13 JT14 SWPS038-109 AM3715, AM3703 SPRS616F – JUNE 2010 – REVISED AUGUST 2011 www.ti.com (1) In jtag_emux, x is equal to 0 or 1. Figure 6-82. JTAG —Free-Running Clock Mode 6.6.9.3.2 JTAG —Adaptative Clock Mode Table 6-146 and Table 6-147 assume testing over the recommended operating conditions and electrical characteristic conditions below (see Figure 6-83). Table 6-145. JTAG Timing Conditions —Adaptative Clock Mode TIMING CONDITION PARAMETER VALUE UNIT Input Conditions tR Input signal rise time 5 ns tF Input signal fall time 5 ns Output Condition CLOAD Output load capacitance 30 pF Table 6-146. JTAG Timing Requirements —Adaptative Clock Mode(4) (5) NO. PARAMETER OPP100 OPP50 UNIT MIN MAX MIN MAX JA4 1 / tc(tck) Frequency(1), input clock jtag_tck 50 50 MHz JA5 tw(tckL) Pulse duration, input clock jtag_tck low 0.5P(2) 0.5P(2) ns JA6 tw(tckH) Pulse duration, input clock jtag_tck high 0.5P(2) 0.5P(2) ns tdc(lclk) Duty cycle error, input clock jtag_tck –2500 2500 –2500 2500 ps tJ(lclk) Cycle jitter(3), input clock jtag_tck –1500 1500 –1500 1500 ps JA7 tsu(tdiV-tckH) Setup time, input data jtag_tdi valid before input clock 13.8 13.8 ns jtag_tck high JA8 th(tdiV-tckH) Hold time, input data jtag_tdi valid after input clock 13.8 13.8 ns jtag_tck high JA9 tsu(tmsV-tckH) Setup time, input mode select jtag_tms_tmsc valid 13.8 13.8 ns before input clock jtag_tck high JA10 th(tmsV-tckH) Hold time, input mode select jtag_tms_tmsc valid after 13.8 13.8 ns input clock jtag_tck high 268 Timing Requirements and Switching Characteristics Copyright © 2010–2011, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Link(s): AM3715 AM3703 |
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