ADV7172 datasheet(33/60 Pages) AD

33 / 60 page

REV. B

ADV7172/ADV7173

–33–

MODE REGISTER 7 MR7 (MR77–MR70)

(Address (SR4–SR0) = 07H)

Mode Register 7 is an 8-bit-wide register. Figure 51 shows the

various operations under the control of Mode Register 7.

MR7 BIT DESCRIPTION

Color Control Enable (MR70)

This bit is used to enable control of contrast and saturation of

color. If this bit is set (“1”), color controls are enabled; if this

bit is set (“0”), the color control features are disabled.

Luma Saturation Control (MR71)

When this bit is set (“1”), the luma signal will be clipped if it

reaches a limit that corresponds to an input luma value of

255 after scaling by the contrast control. This prevents the

chrominance component of the composite video signal being

clipped if the amplitude of the luma is too high. When this bit is

set (“0”), this control is disabled.

Hue Adjust Enable (MR72)

This bit is used to enable hue adjustment on the composite and

chroma output signals of the ADV7172/ADV7173. When this

bit is set (“1”), the hue of the color is adjusted by the phase

offset described in the Hue Control Register. When this bit is

set (“0”) hue adjustment is disabled.

Brightness Enable Control (MR73)

This bit is used to enable brightness control on the ADV7172/

ADV7173 by enabling the programmable “setup level” or ped-

estal described in the Brightness Control Register to be added to

the scaled Y data. When this bit is set (“1”), brightness control

is enabled. When this bit is set (“0”), brightness control is disabled.

Sharpness Response Enable (MR74)

This bit is used to enable the sharpness of the luminance signal

on the ADV7172/ADV7173 (MR04–MR02 = 100). The various

responses of the filter are determined by the Sharpness Response

by the amount described in the Sharpness Response Register.

When this bit is set (“0”), the sharpness control is disabled (see

Figures 19, 20, and 21 for luma signal responses).

CSO_HSO Output Control (MR75)

This bit is used to determine whether

HSO or CSO TTL out-

put signal is output at the

CSO_HSO pin. If this bit is set (“1”),

then the

CSO TTL signal is output. If this bit is set (“0”), then

the

HSO TTL signal is output.

Reserved (MR77–MR76)

A Logic “0” must be written to these bits.

MR71

MR70

MR77

MR72

MR74

MR73

MR75

MR76

MR77 MR76

ZERO SHOULD

BE WRITTEN TO

THESE BITS

CSO_HSO

OUTPUT CONTROL

HSO OUT

CSO OUT

MR75

BRIGHTNESS

ENABLE CONTROL

DISABLE

ENABLE

MR73

LUMA SATURATION

CONTROL

DISABLE

ENABLE

MR71

SHARPNESS

RESPONSE ENABLE

DISABLE

ENABLE

MR74

HUE ADJUST

ENABLE

DISABLE

ENABLE

MR72

COLOR CONTROL

ENABLE

DISABLE

ENABLE

MR70

Figure 51. Mode Register 7 (MR7)

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