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AIC1340CS Datasheet(PDF) 6 Page - Analog Intergrations Corporation |
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AIC1340CS Datasheet(HTML) 6 Page - Analog Intergrations Corporation |
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6 / 7 page ![]() AIC1340 6 Pin 7: VIN2: This pin supplies power to the in- ternal regulator. Connect this pin to a suitable 3.3V source. Additionally, this pin is used to monitor the 3.3V supply. If, fol- lowing a start-up cycle, the volt- age drops below 2.6V (typically), the chip shuts down. A new soft- start cycle is initiated upon return of the 3.3V supply above the un- der-voltage threshold. Pin 8: VOUT2: Output of the linear regulator. Supplies current up to 500mA. Pin 9: GND: Signal GND for IC. All voltage levels are measured with respect to this pin. Pin 10: GATE3: Linear Controller output drive pin. This pin can drive either a Dar- lington NPN transistor or a N- channel MOSFET. Pin 11: FB3 Negative feedback pin for the linear controller error amplifier connect this pin to a resistor di- vider to set the linear controller output voltage. Pin 12: COMP1 External compensation pin. This pin is connected to error amplifier output and PWM comparator. An RC network is connected to FB1 in to compensate the voltage control feedback loop of the con- verter. Pin 13: FB1 The error amplifier inverting input pin. the FB1 pin and COMP1 pin are used to compensate the volt- age-control feedback loop. Pin 14: OCSET: Current limit sense pin. Connect a resistor ROCSET from this pin to the drain of the external high-side N-MOSFET. ROCSET, an internal 200 µA current source (I OCSET), and the upper N-MOSFET on- resistance (RDS(ON)) set the over- current trip point according to the following equation: I I R R PEAK OCSET OCSET DS(ON) = × Pin 15: PGND: Driver power GND pin. PGND should be connected to a low im- pedance ground plane in close to lower N-MOSFET source. Pin 16: LGATE: Lower N-MOSFET gate drive pin. |
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