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AIC1567CS Datasheet(PDF) 6 Page - Analog Intergrations Corporation |
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AIC1567CS Datasheet(HTML) 6 Page - Analog Intergrations Corporation |
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6 / 7 page ![]() AIC1567 6 PIN DESCRIPTIONS PIN 1: VSEN - Converter output voltage sense pin. Connect this pin to the converter output. The PGOOD and OVP comparator circuits use this signal to report output voltage status and for overvoltage protection function. PIN 2: OCSET - Current limit sense pin. Connect a resistor R OCSET from this pin to the drain of the external MOSFET. R OCSET, an internal 200 µA current source (IOCS), and the external MOSFET on- resistance (RDS(ON)) jointly set the over current trip point according to the following equation: I IR R PEAK OCS OCSET DS ON = × () If FB pin voltage is sensed to be below 50% of the internal voltage reference VDAC, the over current comparator cycles the soft-start function. PIN 3: SS - Soft start pin. Connect a capacitor from this pin to ground. An internal 10 µA current source provides soft start function for the converter. PIN 4: VID0 PIN 5: VID1 PIN 6: VID2 PIN 7: VID3 PIN 8: VID4 - 5-bit DAC voltage select pin. TTL inputs used to set the internal voltage reference VDAC. When left open, these pins are internally pulled up to 5V and provide logic ones. The level of VDAC sets the converter output voltage as well as the PGOOD and OVP thresholds. Table 1 specifies the VDAC voltage for the 32 combinations of DAC inputs. PIN 9: COMP - External compensation pin. This pin is connected to error amplifier output and PWM comparator. An RC network is connected to FB pin to compensate the voltage-control feedback loop of the converter. PIN 10: FB - The error amplifier inverting input pin. The FB pin and COMP pin are used to compensate the voltage-control feedback loop. PIN 11: CLP - Linear regulator current sense pin. This pin is the positive input of the current sense comparator. PIN 12: CLN - Linear regulator current sense pin. This pin is the negative input of the current sense comparator. PIN 13: VLFB - Negative feedback pin for the linear regulator error amplifier. PIN 14: LIDRI - Linear regulator output drive pin. This pin can drive either a Darlington NPN or an N-channel MOSFET. PIN 15: GND - Signal GND. It also serves as the power GND for the upper gate driver. PIN 16: PGOOD-Power good indicator pin. PGOOD is an open drain output. This pin is pulled low when the converter output is ±10% out of the VDAC reference voltage. Table 1. Output Voltage Program VID4 VID3 VID2 VID1 VID0 VDAC 1000 0 3.5V 1000 1 3.4V 1001 0 3.3V 1001 1 3.2V 1010 0 3.1V 1010 1 3.0V 1011 0 2.9V 1011 1 2.8V 1100 0 2.7V 1100 1 2.6V 1101 0 2.5V 1101 1 2.4V 1110 0 2.3V 1110 1 2.2V |
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