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AD5280 Datasheet(PDF) 6 Page - Analog Devices |
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AD5280 Datasheet(HTML) 6 Page - Analog Devices |
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6 / 28 page  AD5280/AD5282 Rev. C | Page 6 of 28 SDA PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS A W B SHDN SCL VDD 1 2 3 4 5 6 14 13 12 11 10 9 7 8 O1 VL O2 GND AD1 VSS AD5280 TOP VIEW AD0 O1 A1 W1 VDD SHDN B1 SCL A2 W2 B2 VSS GND VL AD1 1 16 2 15 3 14 Figure 4. AD5280 Pin Configuration 4 13 5 12 6 7 SDA 8 11 10 9 AD0 AD5282 TOP VIEW Figure 5. AD5282 Pin Configuration Table 4. AD5280 Pin Function Descriptions Pin No. Mnemonic Description 1 A Resistor Terminal A. 2 W Wiper Terminal W. 3 B Resistor Terminal B. 4 VDD Positive Power Supply. Specified for operation from 5 V to 15 V (sum of |VDD| + |VSS| ≤ 15 V). 5 SHDN Active Low, Asynchronous Connection of Wiper W to Terminal B and Open Circuit of Terminal A. RDAC register contents unchanged. SHDN should tie to VL if not used. Can also be used as a programmable preset in power-up. 6 SCL Serial Clock Input. 7 SDA Serial Data Input/Output. 8 AD0 Programmable Address Bit 0 for Multiple Package Decoding. Bit AD0 and Bit AD1 provide four possible addresses. 9 AD1 Programmable Address Bit 1 for Multiple Package Decoding. Bit AD0 and Bit AD1 provide four possible addresses. 10 GND Common Ground. 11 VSS Negative Power Supply. Specified for operation from 0 V to −5 V (sum of |VDD| + |VSS| ≤ 15 V). 12 O2 Logic Output Terminal O2. 13 VL Logic Supply Voltage. Needs to be less than or equal to VDD and at the same voltage as the digital logic controlling the AD5280. 14 O1 Logic Output Terminal O1. Table 5. AD5282 Pin Function Descriptions Pin No. Mnemonic Description 1 O1 Logic Output Terminal O1. 2 A1 Resistor Terminal A1. 3 W1 Wiper Terminal W1. 4 B1 Resistor Terminal B1. 5 VDD Positive Power Supply. Specified for operation from 5 V to 15 V (sum of |VDD| + |VSS| ≤ 15 V). 6 SHDN Active Low, Asynchronous Connection of Wiper W to Terminal B and Open Circuit of Terminal A. RDAC register contents unchanged. SHDN should tie to VL if not used. Can be also used as a programmable preset in power-up. 7 SCL Serial Clock Input. 8 SDA Serial Data Input/Output. 9 AD0 Programmable Address Bit 0 for Multiple Package Decoding. Bit AD0 and Bit AD1 provide four possible addresses. 10 AD1 Programmable Address Bit 1 for Multiple Package Decoding. Bit AD0 and Bit AD1 provide four possible addresses. 11 GND Common Ground. 12 VSS Negative Power Supply. Specified for operation from 0 V to −5 V (sum of |VDD| + |VSS| ≤ 15 V). 13 VL Logic Supply Voltage. Needs to be less than or equal to VDD and at the same voltage as the digital logic controlling the AD5282. 14 B2 Resistor Terminal B2. 15 W2 Wiper Terminal W2. 16 A2 Resistor Terminal A2. |
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