REV. 0

–12–

AD7738

Table VII. Register Summary

Addr

Dir

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

Register

hex

Default Value

Communications

00

W

0

R/

W

6-Bit Register Address

I/O Port

01

R/W

P0

P1

P0 DIR P1 DIR

RDY FN

0

0

SYNC

P0 Pin

P1 Pin

1

1

0

0

0

0

Revision

02

R

Chip Revision Code

Chip Generic Code

xx

x

x

0

0

0

1

Test

03

R/W

24 Bits Manufacturing Test Register

ADC Status

04

R

RDY7

RDY6

RDY5

RDY4

RDY3

RDY2

RDY1

RDY0

00

0

0

0

0

00

Checksum

05

R/W

16-Bit Checksum Register

ADC ZS Calibration

06

R/W

24-Bit ADC Zero-Scale Calibration Register

800000h

ADC FS

07

R/W

24-Bit ADC Full-Scale Register

800000h

Channel Data

1

08-0F

R

16-/24-Bit Data Registers

8000h

Channel ZS Calibration

1

10–17

R/W

24-Bit Channel Zero-Scale Calibration Registers

800000h

Channel FS Calibration

1

18–1F

R/W

24-Bits Channel Full-Scale Calibration Registers

200000h

Channel Status

1

20–27

R

CH2

CH1

CH0

0/P0

RDY/P1

NOREF

SIGN

OVR

Channel Number

0

0

0

0

0

Channel Setup

1

28–2F

R/W

BUF OFF COM1 COM0

Stat. Opt. ENABLE

RNG2

RNG1

RNG0

00

0

0

0

0

00

Channel Conv. Time

1

30–37

R/W

CHOP

FW (7-Bit Filter Word)

1

11h

Mode

2

38–3F

R/W

MD2

MD1

MD0

CLKDIS

DUMP

Cont. RD

24/16 Bits CLAMP

00

0

0

0

0

00

NOTES

the ADC channel on which the mode will be applied. Address 38h only must be used for reading from the Mode register.

Table VIII. Operational Mode Summary

MD2

MD1

MD0

Mode

000

Idle Mode

001

Continuous Conversion Mode

010

Single Conversion Mode

011

Power-Down (Standby) Mode

100

ADC Zero-Scale Self Calibration

101

For Future Use

110

Channel Zero-Scale System Calibration

111

Channel Full-Scale System Calibration

Table IX. Input Range Summary

RNG2

RNG1

RNG0

Nominal Input Voltage Range

10

0

±2.5 V

10

10 V to +2.5 V

00

0

±1.25 V

00

10 V to +1.25 V

01

0

±0.625 V

01

10 V to +0.625 V