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AD7738

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CALIBRATION

The AD7738 provides zero-scale self-calibration, and zero and

full system calibration capability, which can effectively reduce

the offset error and gain error to the order of the noise. After

each conversion, the ADC conversion result is scaled using the

ADC Calibration Registers and the relevant Channel Calibration

registers before being written to the Data register. See the equa-

tions shown below.

For unipolar ranges:

Data = ((ADC result – ADC ZS Cal. reg.)

ADC FS reg./

200000h – Ch. ZS Cal. reg.)

Ch. FS Cal. reg./200000h

For bipolar ranges:

Data = ((ADC result – ADC ZS Cal. reg.)

ADC FS reg./

400000h + 800000h – Ch. ZS Cal. reg.)

Ch. FS Cal. reg./

200000h

Where the ADC result is in the range of 0 to FFFFFFh.

Note that the Channel ZS Calibration register has the format of

a sign bit + 22 bits Channel offset value.

It is strongly recommended that the user does not change the

ADC FS register.

To start any calibration, write the relevant mode bits to the

AD7738 Mode register. After the calibration is complete, the

contents of the corresponding Calibration registers are updated, all

RDY bits in the ADC Status register are set, the

RDY pin goes

low, and the AD7738 reverts to Idle mode.

The calibration duration is the same as conversion time configured

on the selected channel. The longer conversion time gives less

noise and yields a more exact calibration. Therefore, use at least

the default conversion time to initiate any calibration.

ADC Zero-Scale Self-Calibration

The ADC Zero-Scale Self-Calibration can effectively remove

the offset error in Chopping Disabled mode. If repeated after a

temperature change, it can also remove the offset drift error in

Chopping Disabled mode.

The zero-scale self-calibration is performed on internally shorted

ADC inputs. The negative Analog Input terminal on the selected

channel is used to set the ADC ZS Calibration common mode.

Therefore, either the negative terminal on selected differential pair

or AINCOM on single-ended channel configuration should be

driven to a proper commwon-mode voltage.

It is strongly recommended that the ADC ZS Calibration register

should only be updated as part of a zero-scale self-calibration.

Per Channel System Calibration

If the per channel system calibrations are used, these should be

initiated in the following order: first a Channel ZS System Cali-

bration followed by a Channel FS System Calibration.

The System Calibration is affected by the ADC ZS and FS Cali-

bration registers; therefore, if both Self-Calibration and System

Calibration are used in a system, an ADC Self-Calibration cycle

should be performed first followed by a System Calibration cycle.

While executing a system calibration, the fully settled system

zero-scale voltage signal or system full-scale voltage signal must

be connected to the selected channel analog inputs.

The per channel Calibration registers can be read, stored, or

modified and written back to the AD7738. Note, when writing

the Calibration registers the AD7738 must be in the idle mode.

Note that outside the specified calibration range, the calibration

is possible but the performance may degrade. (See the System

Calibration section in the specification pages of this data sheet.)

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