115 Northeast Cutoff, Box 15036

Worcester, Massachusetts 01615-0036 (508) 853-5000

USB

POWER CONTROL

SWITCHES

8

Overcurrent

A sense FET is employed for overcurrent conditions. Unlike

current-sense resistors, sense FETs do not increase the series

resistance of the current path. When an overcurrent condition is

detected, the device maintains a constant output current and

reduces the output voltage accordingly. Complete shutdown

occurs only if the fault is present long enough to activate

thermal limiting.

Three possible overload conditions can occur. In the first

condition, the output has been shorted before the device is

the short and immediately switches into a constant-current

output.

In the second condition, the short occurs while the device is

enabled. At the instant the short occurs, very high currents may

flow for a short time before the current-limit circuit can react .

After the current-limit circuit has tripped (reached the

overcurrent trip threshold) the device switches into constant-

current mode.

In the third condition, the load has been gradually increased

beyond the recommended operating current. The current is

permitted to rise until the current-limit threshold is reached or

until the thermal limit of the device is exceeded. The device is

capable of delivering current up to the current-limit threshold

without damage. Once the threshold has been reached, the

device switches into its constant-current mode.

Fault Flag (FLG)

The FLG open-drain output is asserted (active low) when an

overcurrent or over-temperature condition is encountered. The

output will remain asserted until the overcurrent or over-

temperature condition is removed. Connecting a heavy

capacitive load to an enabled device can cause momentary false

over-current reporting from the inrush current flowing through

the device, charging the downstream capacitor. An RC filter

can be connected to the terminal to reduce false overcurrent

reporting. Using low-ESR electrolytic capacitors on the output

lowers the inrush current flow through the device during hot-

plug events by providing a low impedance energy source,

thereby reducing erroneous overcurrent reporting.

Power dissipation and junction temperature

The low on-resistance of the n-channel MOSFET allows small

surface-mount packages, such as an SOIC, to pass large

currents. The thermal resistance of these packages are high

compared to those of power packages; it is good design practice

to check power dissipation and junction temperature. The first

ture. Next, calculate the power dissipation using:

Finally, calculate the junction temperature:

where:

°C

Thermal protection

Thermal protection prevents damage to the IC when heavy-

overload or short-circuit faults are present for extended periods

of time. The faults force these devices into constant-current

mode, which causes the voltage across the high-side switch to

increase; under short-circuit conditions, the voltage across the

switch is equal to the input voltage. The increased dissipation

causes the junction temperature to rise to high levels. The

protection circuit senses the junction temperature of the switch

and shuts it OFF. Hysteresis is built into the thermal sense

circuit, and after the device has cooled approximately 20

°, the

switch turns back ON. The switch continues to cycle in this

manner until the load fault or input power is removed.

Undervoltage lock-out (UVLO)

An undervoltage lockout ensures that the power switch is in the

OFF state at power up. Whenever the input voltage falls below

approximately 2 V, the power switch will be quickly turned

OFF. This facilitates the design of hot-insertion systems where

it is not possible to turn OFF the power switch before input

power is removed. The UVLO will also keep the switch from

being turned ON until the power supply has reached at least

2 V, even if the switch is enabled. Upon reinsertion, the power

switch will be turned ON, with a controlled rise time to reduce

EMI and voltage overshoots.

Power supply considerations

A 0.1

µF ceramic bypass capacitor between IN and GND, close

to the device, is recommended. Placing a high-value electro-

lytic capacitor on the output terminals is also desirable when the

output load is heavy. The capacitor reduces power supply

transients that may cause ringing on the input. Also, bypassing

the output with a 0.01

µF to 0.1 µF ceramic capacitor improves

the immunity of the device to short-circuit transients.

APPLICATIONS INFORMATION