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3932 Datasheet(PDF) 5 Page - Allegro MicroSystems |
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3932 Datasheet(HTML) 5 Page - Allegro MicroSystems |
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5 / 8 page ![]() Page 5 3932 THREE-PHASE POWER MOSFET CONTROLLER Pin Descriptions RESET. A logic input that enables the device, internally pulled up to LCAP. Logic HIGH will disable the device and turn off MOSFETs, coasting the motor. Logic LOW will enable gate drive to follow commutation logic. This input will override BRAKE. GLC/GLB/GLA. Low side gate drive outputs for external MOSFET drivers. External series gate resistors can be used to control slew rate seen at the power driver gate, thereby controlling the di/dt and dv/dt of S outputs. The outputs will source 1.25A for turn-on and sink 2.5A for gate discharge. SC/SB/SA. Directly connected to the motor terminals, these pins sense the voltages switched across the load. The pin is also connected to the negative side of the bootstrap capacitor and negative supply connection for the floating high side drive. GHC/GHB/GHA. High side gate drive outputs for n- channel MOSFET drivers. External series gate resistors can be used to control slew rate seen at the power driver gate, thereby controlling the di/dt and dv/dt of S outputs. The outputs will source 1.25A for turn-on and sink 2.5A for gate discharge. CC/CB/CA. High side connection for bootstrap capacitor, positive supply for high side gate drive. The bootstrap capacitor is charged to approximately VREG when the output Sx terminal is low. When the output swings high, the voltage on this pin rises with the output to provide the boosted gate voltage needed for N-channel power MOSFETs. MODE. Logic input to set current decay method. Slow decay mode (logic HIGH) switches off the high side FET in response to PWM Off command. Fast decay mode (logic LOW) switches off the source and sink MOSFET’s. Mode pin is internally pulled up to LCAP. H1/H2/H3. Hall sensor inputs, internally pulled up to LCAP. Configured for 120-degree electrical spacing. DIR. Logic input to reverse rotation, see commutation logic table. Internally pulled up to LCAP. FAULT. Open drain output to indicate fault condition. Will go active high for any of the following fault conditions: 1) Invalid HALL input code. 2) High side gate-source undervoltage. 3) Bootstrap capacitor not sufficiently charged. 4) Undervoltage condition detected at VREG. 5) Thermal Shutdown. 6) Motor lead (SA/SB/SC) connected to ground. Any fault will force a COAST condition, which turns all power MOSFETs off. The fault state for gate-source and bootstrap monitors is cleared at each commutation. If the motor has stalled, the fault must be cleared by toggling the RESET pin or repeating a power up sequence. BRAKE. Logic input for braking function. Logic LOW will turn on sink side MOSFETs, turn off the source side MOSFETs. This will effectively short the BEMF in the windings and brake the motor. Internally pulled up to logic LCAP. SR. Synchronous rectification input. Logic LOW disables the feature forcing current decay through flyback diodes. Logic HIGH will result in the opposite pair of drivers to switch in response to a PWM “off” command. Internally pulled up to LCAP. TACH. Digital output to indicate speed of rotation. A 3µs pulse appears at every Hall transition. PWM. Speed control input. Logic HIGH will turn on MOSFETs selected by Hall input logic. Logic LOW turns off the selected MOSFETs. The PWM input held high to utilize internal current control circuitry. Internally pulled up to logic LCAP. RC. Analog input. Connection for RT and CT to set the fixed off time. The CT will also set the BLANK time. (see applications information). It is recommended that the fixed off time should not be less than 10 µs. The resistor should be in the range 10k to 500k. SENSE. Analog input to the current limit comparator. Voltage representing load current appears on this pin. Voltage transients seen at this pin when the drivers turn on are ignored for time Tblank. |
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