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3932 Datasheet(PDF) 6 Page - Allegro MicroSystems |
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3932 Datasheet(HTML) 6 Page - Allegro MicroSystems |
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6 / 8 page ![]() Page 6 3932 THREE-PHASE POWER MOSFET CONTROLLER PIN DESCRIPTIONS (continued) VREG. Regulated 13 V output supply for low side gate drive and bootstrap capacitor charge circuit. It is good practice to connect a decoupling capacitor from this pin to AGND, as close to the device pins as possible. Pin should be shorted to VBB for 12V applications. VBB. Motor power supply connection for A3932 and power MOSFETs. Pin should be shorted to VREG for 12V applications. REF. Analog input to current limit comparator. Voltage applied here sets the peak load current according to the equation: ITRIP = VREF/RSENSE LCAP. 5V reference to power internal logic, connection for decoupling cap. This pin requires 1nF external capacitor for decoupling and should not be used to power any external circuitry. DEAD. Analog input. A resistor between DEAD and LCAP is selected to adjust turn-off to turn-on time. This delay is needed to prevent shoot-thru in the external power FET’s. The resistor allowable range is 5.6k to 470k, which converts to deadtime of 100ns to 5500ns. TDEAD ≅ 11e-12 * RDEAD AGND. Analog reference. PGND. Return for low side gate drive. This should be connected to PCB power ground. Commutation Truth Table H1 H2 H3 DIR GLA GLB GLC GHA GHB GHC SA SB SC 1 0 1 1 0 0 1 1 0 0 HI Z LO 1 0 0 1 0 0 1 0 1 0 Z HI LO 1 1 0 1 1 0 0 0 1 0 LO HI Z 0 1 0 1 1 0 0 0 0 1 LO Z HI 0 1 1 1 0 1 0 0 0 1 Z LO HI 0 0 1 1 0 1 0 1 0 0 HI LO Z 1 0 1 0 1 0 0 0 0 1 LO Z HI 1 0 0 0 0 1 0 0 0 1 Z LO HI 1 1 0 0 0 1 0 1 0 0 HI LO Z 0 1 0 0 0 0 1 1 0 0 HI Z LO 0 1 1 0 0 0 1 0 1 0 Z HI LO 0 0 1 0 1 0 0 0 1 0 LO HI Z INPUT LOGIC MODE PWM S/R RESET Quadrant Mode of Operation 0 0 0 0 Fast decay PWM chop– current decay, all drivers off 0 1 0 0 Fast Decay Peak Current limit – selected drivers ON 1 0 0 0 Slow decay PWM chop – current decay, selected Low side ON 1 1 0 0 Slow Decay Peak Current limit mode – selected drivers ON 0 0 1 0 Fast decay PWM chop – current decay with opposite of selected drivers ON 0 1 1 0 Fast Decay Peak Current limit – selected drivers ON 1 0 1 0 Slow decay PWM chop – current decay with both Low side drivers ON 1 1 1 0 Slow Decay Peak Current limit – selected drivers ON X X X 1 X All gate drive outputs to 0V – Clear fault logic |
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