A1010 datasheet(2/24 Pages) ACTEL

2 / 24 page

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The systems are available for 386/486/Pentium™ PC and for

HP™ and Sun™ workstations and for running Viewlogic®,

Mentor Graphics®, Cadence™, OrCAD™, and Synopsys

design environments.

ACT 1 Device Structure

A partial view of an ACT 1 device (Figure 1) depicts four logic

modules and distributed horizontal and vertical interconnect

tracks. PLICE antifuses, located at intersections of the

horizontal and vertical tracks, connect logic module inputs

and outputs. During programming, these antifuses are

addressed and programmed to make the connections

required by the circuit application.

The ACT 1 Logic Module

The ACT 1 logic module is an 8-input, one-output logic circuit

chosen for the wide range of functions it implements and for

its efficient use of interconnect routing resources (Figure 2).

The logic module can implement the four basic logic

functions (NAND, AND, OR, and NOR) in gates of two, three,

or four inputs. Each function may have many versions, with

different combinations of active-low inputs. The logic module

can also implement a variety of D-latches, exclusivity

functions, AND-ORs, and OR-ANDs. No dedicated hardwired

latches or flip-flops are required in the array, since latches

and flip-flops may be constructed from logic modules

wherever needed in the application.

I/O Buffers

Each I/O pin is available as an input, output, three-state, or

bidirectional buffer. Input and output levels are compatible

with standard TTL and CMOS specifications. Outputs sink or

Figure 1 • Partial View of an ACT 1 Device

Figure 2 • ACT 1 Logic Module

A1010 Datasheet(PDF) 2 Page - Actel Corporation