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MP2617GL Datasheet(PDF) 17 Page - Monolithic Power Systems

Part # MP2617GL
Description  3A Switching Charger with NVDC Power Path Management For Single Cell Li Battery
PDF  29 Pages
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Manufacturer  MPS [Monolithic Power Systems]
Direct Link  http://www.monolithicpower.com
Logo MPS - Monolithic Power Systems

MP2617GL Datasheet(HTML) 17 Page - Monolithic Power Systems

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MP2617 – SINGLE CELL SWITCHING CHARGER WITH POWER PATH CONTROL
MP2617 Rev. 1.03
www.MonolithicPower.com
17
8/23/2013
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2013 MPS. All Rights Reserved.
When both M0 and M1 are float, they are pulled
to the logic high, under this condition, the input
current is limited to a default value of 2A.
Table 1―Input Current Limit Setting
M0
M1
Mode
Low
Low
USB2.0 Mode
Low
High
USB3.0 Mode
High
Low
Programmable Mode
High/Float High/Float Default Mode
Input Voltage Limit Setting
The input voltage can be limited at a value set by
a resistor divider from IN pin to VLIM pin to
AGND according to the following expression
(Typical Application Circuit):
IN_LIM
R1+R2
V
=1.52
(V)
R2
×
When the voltage on VLIM pin drops and hits the
reference voltage 1.52V, the input voltage will be
clamped to the setting value.
Battery Charger
The MP2617 completes charge operation consist
of trickle charge, automatic charge termination,
charge status indication, timer control, NTC
indication, automatic recharge, and thermal
limiting.
When the PWM converter is out of soft start, the
battery charge cycle begins, the MP2617 first
determines if the battery is deeply discharged. If
the battery voltage is lower than the trick charge
threshold (typical 3.0V), the battery charger starts
in “trickle charge mode”. The trickle charge
current is limited to 10% of the programmed
charge current until the battery voltage reaches
3.0V. If the charge stays in the “trickle charging
mode” for longer than 45 minutes, the “timer out”
condition is triggered, the charge is terminated
and CHGOK
_____________
will start blinking to indicate that the
battery is unresponsive. When the battery
voltage is above 3.0V, the charger is operating at
“constant current mode.” The current delivered to
the
battery
will
try
to
reach
the
value
programmed by the ISET pin. Depending on the
available input power and system load conditions,
the battery charger may or may not be able to
charge at the full programmed rate. The system
load is always satisfied first over the battery
charge current. If the system load requirement is
low, the battery can be charged at full constant
current.
When the battery voltage reaches the battery full
threshold, the charger enters the “constant
voltage mode” operation.
End of Charge (EOC) and Indication
In constant voltage charge mode, the battery
voltage is regulated at 4.2V (when SYSFB is float
or SYS is programmed higher than battery full
threshold) and the charge current decreases
naturally. Once the charge current hits the
battery full threshold IBF (1/10 programmed
charge current), the battery is fully charged and
charge cycle is terminated.
If the charge current drops below IBF because of
any limit condition, the MP2617 will come out of
CV mode, and the charge full detection is invalid.
A safe timer starts at the beginning of each new
charge cycle and it monitors if the whole charge
period is within the programmed time limit. After
each charge cycle, when the battery is indicated
as full, the timer counter will be reset. If the time
is expired while the charging is still on going, the
timer will force the MP2617 to terminate charging
CHGOK
_____________
is blinking to indicate the fault condition.
If system voltage is programmed lower than 4.2V
by the resistor divider at the SYSFB pin, the
battery will be charged most close to VSYS until
the charge current reaches the IBF threshold.
During charging, the PWM converter continues to
power the system at the same time, if the system
load increases over the input current limit, the
battery charger will change to “ideal diode mode”.
Two comparators between VSYS and VBATT are
used to detect this condition. If VSYS<VBATT-40mV
is triggered, the ideal diode mode is enabled,
else, if VSYS increases back to VSYS>VBATT+40mV,
the ideal diode mode is disabled as shown in
Figure 3.



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