MP2617 – SINGLE CELL SWITCHING CHARGER WITH POWER PATH CONTROL

MP2617 Rev. 1.03

www.MonolithicPower.com

27

8/23/2013

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%

65

=

VCC

V

=

//R

R

+

R

//R

R

TH_Low

NTC_Cold

T2

T1

NTC_Cold

T2

(14)

33.5%

=

VCC

V

=

//R

R

+

R

//R

R

TH_High

NTC_Hot

T2

T1

NTC_Hot

T2

(15)

temperature

of

the

required

temperature

the NTC resistor at low temperature.

temperature limit and low temperature limit to

be programmed independently. With this

feature, the MP2617 can fit most type of NTC

resistor and different temperature operation

range requirements.

NTC resistor:

NTC_Hot

NTC_Cold

NTC_Hot

NTC_Cold

T2

R

.4225

0

-

R

1225

.

0

R

R

.3

0

R

×

×

×

×

=

(16)

)

R

R

(

2275

.

0

R

R

0.3

R

NTC_Hot

NTC_Cold

NTC_Cold

NTC_Hot

T1

−

×

×

×

=

(17)

For example, for the thermistor NCP18XH103,

it has the following electrical characteristic:

The following equations are derived assuming

that the NTC window is between 0°C and 50°C.

According to the above equations to calculate

NTC

VCC

Low Temp Threshold

High Temp Threshold

Figure 8—NTC Function Block

PCB Layout Guideline

It is important to pay special attention to the

PCB layout to meet specified noise, efficiency

and stability requirements. The following design

considerations can improve circuit performance:

1) Route the power stage adjacent to their

grounds. Aim to minimize the high-side

switching node (SW, inductor), trace lengths in

the high-current paths and the current sense

resistor trace.

Keep the switching node short and away from

all small control signals, especially the feedback

network.

Place the input capacitor as close as possible

to the IN and PGND pins.

Place the output inductor close to the IC and

connect the output capacitor between the

inductor and PGND of the IC.

2) For high-current applications, the balls for the

power pads (IN, SW, SYS, BATT and PGND)

should be connected to as much copper in the

board as possible. This improves thermal

performance because the board conducts heat

away from the IC.

3) The PCB should have a ground plane

connected

directly

to

the

return

of

all

components through vias (two vias per

capacitor for power-stage capacitors, one via

per capacitor for small-signal components). It is

also recommended to put vias inside the PGND

pads for the IC, if possible. A star ground

design approach is typically used to keep circuit

block currents isolated (high-power/low-power

small-signal) which reduces noise-coupling and

ground-bounce issues. A single ground plane

for this design gives good results. With this

small layout and a single ground plane, there is

no ground-bounce issue, and having the

components segregated minimizes coupling

between signals.