MP3900 – HIGH EFFICIENCY BOOST CONTROLLER

MP3900 Rev. 1.0

www.MonolithicPower.com

6

12/17/2013

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OPERATION

Enable

Vref = 0.8V

FB

Clamp

Slope

Compensation

COMP/RUN

SGND

EA Translator

Optional Filter

EA

Oscillator

Internal

Bias

--

+

Rsense

Driver

PGND

Rdson

sensing

GATE

ISENSE

Gates

Off

Turn

Off

--

+

S

R

Q

Q

Figure 1—Functional Block Diagram

The MP3900 uses a constant frequency, peak

current mode architecture to regulate the

feedback voltage. The operation of the MP3900

can be understood with the block diagram of

Figure 1.

At the beginning of each cycle the external

N-Channel MOSFET is turned on, forcing the

current in the inductor to increase. The current

through the FET can either be sensed through

a sensing resistor or across the external FET

directly. This voltage is then compared to a

voltage related to the COMP/RUN node voltage.

The voltage at the COMP/RUN pin is an

amplified voltage of the difference between the

0.8V reference and the feedback node voltage.

When the voltage at the ISENSE node rises

above the voltage set by the COMP/RUN pin,

the external FET is turned off. The inductor

current then flows to the output capacitor

through the Schottky diode. The inductor

current is controlled by the COMP/RUN voltage,

which itself is controlled by the output voltage.

The peak inductor current is internally limited by

Thus the output voltage controls the inductor

current to satisfy the load. This current mode

architecture improves transient response and

control loop stability over a voltage mode

architecture.