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MP6903 Datasheet(PDF) 8 Page - Monolithic Power Systems |
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MP6903 Datasheet(HTML) 8 Page - Monolithic Power Systems |
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8 / 10 page ![]() MP6903- FAST TURN-OFF INTELLIGENT CONTROLLER MP6903 Rev. 1.04 www.MonolithicPower.com 8 1/31/2013 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2013 MPS. All Rights Reserved. Thermal shutdown If the junction temperature of the chip exceeds 180°C, the VG will be pulled low and the part stops switching. The part will resume normal function after the junction temperature has dropped to 150°C. Turn-On Phase When the synchronous MOSFET is on, current flows through its body diode and generates a negative VDS. This body diode voltage drop (< - 500mV) is much smaller than the turn-on threshold of the control circuitry (-70mV), which then pulls the gate driver voltage high to turn on the synchronous MOSFET after about 250ns turn-on delay (shown in Figure 2). When the turn-on delay ends, turn-on starts with a blanking time (minimum on-time: ~0.8µs), and the turn-off threshold changes from +30mV to +100mV. This blanking time helps to avoid errors around the turn-off threshold caused by turn-on ringing of the synchronous MOSFET. Figure 2: Turn On/Off Timing Diagram Conducting Phase When the synchronous MOSFET turns on, VDS rises according to the MOSFET’s ON resistance. When VDS rises above the turn-on threshold (- 70mV), the control circuitry stops pulling up the gate driver, so the gate voltage is pulled down by the internal pull-down resistance (10kΩ) and leakage to increase the ON resistance of the synchronous MOSFET, which to limit the VDS slew rate, stabilizes VDS to around -70mV even when the current through the MOSFET is fairly small. This function limits the driver voltage when the synchronous MOSFET is turned off (this function is still active during turn-on blanking, which means the gate driver could still be turned- off even with very small duty cycles of the synchronous MOSFET). Turn-Off Phase When VDS triggers the turn-off threshold (30mV), the gate voltage is pulled to low after a 20ns turn- off delay (shown in Figure 2) by the control circuitry. Figure 3 shows synchronous rectification operation at heavy load. The gate driver initially saturates due to the high current. After VDS rises above -70mV, the gate driver voltage decreases to adjust the VDS to around -70mV. Figure 4 shows synchronous rectification operation at light load. The gate driver voltage never saturates due to the low current, but decreases as soon as the synchronous MOSFET turns on and adjusts the VDS. Figure 3: Synchronous Rectification Operation at Heavy Load Figure 4: Synchronous Rectification Operation at Light Load |
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