MP8606

– 6A, 6.5V SYNCHRONOUS STEP-DOWN CONVERTER

MP8606 Rev. 1.03

www.MonolithicPower.com

14

8/2/2013

MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.

© 2013 MPS. All Rights Reserved.

APPLICATION INFORMATION

Setting the Output Voltage

The output voltage is set by using a resistive

voltage divider from the output voltage to the FB

pin.

The use of low-ESR ceramic output capacitors

requires adding an external voltage ramp to the

FB through R4 and C4. Choose an R2 value

between 5k

Ω and 40kΩ, then determine R1 using

the following equation:

1

REF

RAMP

4

2

OUT

REF

RAMP

1

R

1

VV

1

2

1

R

R

(V

V

V

)

2













(9)

For sample feedback resistor values and output

voltages, see the design example section on

page 11.

Input Capacitor

The input current to the step-down converter is

discontinuous and therefore requires a capacitor

to supply the AC current to the step-down

converter while maintaining the DC input voltage.

Ceramic capacitors are recommended for best

performance and should be placed as close to

X7R

ceramic

dielectrics

are

recommended

because they are fairly stable with temperature

fluctuations.

The capacitors must also have a ripple current

rating greater than the maximum input ripple

current of the converter. The input ripple current

can be estimated as follows:

OUT

OUT

CIN

OUT

IN

IN

VV

I

I

(1

)

VV





 

(10)

where:

OUT

CIN

I

I

2



(11)

For simplification, choose the input capacitor with

an RMS current rating greater than half of the

maximum load current.

The input capacitance value determines the input

voltage ripple of the converter. If there is an input

voltage ripple requirement in the system, choose

the input capacitor that meets the specification.

The input voltage ripple can be estimated as

follows::

OUT

OUT

OUT

IN

SW

IN

IN

IN

I

V

V

V

(1

)

F

C

V

V







 



(12)

OUT

IN

SW

IN

I

1

V

4

F

C



 



(14)

Output Capacitor

The output capacitor is required to maintain the

DC

output

voltage.

Ceramic

or

POSCON

capacitors are recommended. The output voltage

ripple can be estimated by:

OUT

OUT

OUT

ESR

SW

IN

SW

OUT

VV

1

V

(1

) (R

)

F

L

V

8 F

C





 











(14)

For

ceramic

capacitors,

the

capacitance

dominates

the

impedance

at

the

switching

frequency and is the primary contributor to the

output voltage ripple. For simplification, the

output voltage ripple can be estimated by:

OUT

OUT

OUT

2

SW

OUT

IN

VV

V

(1

)

8 F

L C

V





 



 

(15)

The output voltage ripple caused by ESR is very

small for ceramic capacitors, so it needs an

external ramp to stabilize the system. The

voltage ramp is expected to be around 30mV.

The external ramp can be generated through

IN

FB

ON

RAMP

44

(V

V ) T

V

RC







(16)

12

SW

4

1

2

RR

11

()

2

F

C

5

R

R











(17)