MP28257 –4A, 4.2V-TO-20V, FAST TRANSIENT, SYNCHRONOUS STEP-DOWN CONVERTER

MP28257 Rev 1.0

www.MonolithicPower.com

13

11/8/2011

MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.

© 2011 MPS. All Rights Reserved.

APPLICATION INFORMATION

Setting the Output Voltage

The output voltage is set by using a resistive

voltage divider from the output voltage to the FB

pin.

The use of low-ESR ceramic output capacitors

requires adding an external voltage ramp to the

FB through R4 and C4. Choose an R2 value

between 5kΩ and 40kΩ, then determine R1 using

the following equation:

1

REF

RAMP

4

2OUT

REF

RAMP

1

R

1

VV

1

2

1

R

R(V

V

V

)

2











(9)

For example feedback resistor values and output

voltages, see the design example section on

page 15.

Input Capacitor

The input current to the step-down converter is

discontinuous and therefore requires a capacitor

to supply the AC current to the step-down

converter while maintaining the DC input voltage.

Ceramic capacitors are recommended for best

performance and should be placed as close to

and X7R ceramic dielectrics because they are

fairly stable with temperature fluctuations.

The capacitors must also have a ripple current

rating greater than the maximum input ripple

current of the converter. The input ripple current

can be estimated as follows:

OUT

OUT

CIN

OUT

IN

IN

VV

II

(1

)

VV



 

(10)

where:

OUT

CIN

I

I

2



(11)

For simplification, choose the input capacitor with

an RMS current rating greater than half of the

maximum load current.

The input capacitance value determines the input

voltage ripple of the converter. If there is an input

voltage ripple requirement in the system, choose

the input capacitor that meets the specification.

The input voltage ripple can be estimated as

follows:

OUT

OUT

OUT

IN

SW

IN

IN

IN

IV

V

V(1

)

fC

V

V





 



(12)

OUT

IN

SW

IN

I

1

V

4f

C

 



(13)

Output Capacitor

The output capacitor is required to maintain the

DC output voltage. Ceramic or POSCON

capacitors are recommended. The output voltage

ripple can be estimated as:

OUT

OUT

OUT

ESR

SW

IN

SW

OUT

VV

1

V(1

) (R

)

fL

V

8 f

C



 









(14)

For

ceramic

capacitors,

the

capacitance

dominates the impedance at the switching

frequency and is the primary contributor to the

output voltage ripple. For simplification, the

output voltage ripple can be estimated by:

OUT

OUT

OUT

2

SW

OUT

IN

VV

V(1

)

8f

L C

V



 

 

(15)

The output voltage ripple caused by ESR is very

small for ceramic capacitors, so it needs an

external ramp to stabilize the system. The

voltage ramp is expected to be around 30mV.

The external ramp can be generated through

resistor R4 and capacitor C4, using the following

equation:

IN

OUT

ON

RAMP

44

(V

V

) t

V

RC







(16)

The C4 should meet the following requirement:

12

SW

4

1

2

RR

11

()

2f

C

5

R

R











(17)

In the case of POSCON capacitors, the ESR

dominates the impedance at the switching

frequency. The ramp voltage generated from the

ESR is high enough to stabilize the system, and

does not require an external ramp. A minimum

ESR value of 12mΩ is recommended to ensure

stable

operation

of

the

converter.

For

simplification,

the

output

ripple

can

be

approximated

as: