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ADV7614

Data Sheet

Rev. C | Page 16 of 20

FUNCTIONAL OVERVIEW

HDMI RECEIVER

The HDMIreceiver on the ADV7614 incorporates active

equalization of the HDMIdata signals. This equalization

compensates for the high frequency lossesinherent in HDMI

and DVIcabling, especially at longer lengths and higher

frequencies. The equalizationis programmable. It is capable

of equalizing for cable lengths up to 30 meters to achieve robust

receiver performance at even the highest HDMIdata rates. The

HDMIreceiver supportsall HDTV formats up to 1080p and all

display resolutionsup to UXGA(1600 × 1200 at 60 Hz).

With the inclusionofHDCP, displayscan receiveencryptedvideo

content. The HDMIinterfaceoftheADV7614 allowsfor authen-

tication of a video receiver, decryption of encoded dataat the

receiver, andrenewabilityofthat authentication during transmis-

sion as specified by the HDCP 1.3 protocol.

The HDMIreceiver offersadvanced audio functionality. It sup-

ports multichannel I2S audio for up to eight channels. It also

supportsa six-DSDchannel interfacewith eachchannel carrying

an oversampled1-bit representation of the audiosignal as

delivered on SACD. It incorporates a DST interfacethat outputs

audio data decoded from DST audio packets.The ADV7614

can also receive HBR audio packet streams and outputs them

through the HBR interface in an S/PDIF format conforming to

the IEC60958 standard. It supports multichannel I2S audio for

up to eight channels. The receiver also contains an audio mute

controller that can detect a variety of conditions that may result

in audible extraneous noisein the audio output. On detection of

these conditions, the audio datacan be ramped to prevent audio

clicks or pops.

COMPONENT PROCESSOR (CP)

The video standardssupported by the CP are525i, 625i, 525p,

625p, 720p, 1080i, 1080p, 1250i, VGA up to UXGA at 60 Hz,

and many other standards.

Automaticadjustmentswithin the CP include gain (contrast)

and offset (brightness); manual adjustment controls arealso

supported.

A fully programmable any-to-any 3 × 3 color space conversion

(CSC) matrix is placed between the HDMIprocessor and the

CP section. This enables YCrCb-to-RGBand YCrCb-to-RGB

conversions. Many other standardsof color space can be

implemented using the color space converter.

CP PIXEL DATA OUTPUT MODES

The output section of the CP is highly flexible. It can be confi-

gured in an SDR mode with one data packet perclockcycle

or in a DDR mode wheredata is presented on the rising and

falling edge of the clock. In SDR mode, a 16-/20-/24-bit 4:2:2 or

24-/30-/36-bit 4:4:4 output is possible.In these modes, the HS,

VS, FIELD, and DE(where applicable)timing referencesignals

are provided. In DDR mode, theADV7614 can beconfiguredin

an 8-/10-/12-bit 4:2:2 YCrCb or 12-bit 4:4:4 RGB/YCrCb pixel

output interfacewith corresponding timing signals.

I2C INTERFACE

The ADV7614 supports a 2-wire serial (I2C-compatible)

microprocessor busdriving multiple peripherals. The

ADV7614 is controlled by an external I2C master device,

such as a microcontroller.

OTHER FEATURES

In addition toHS,VS, andFIELDoutput signals withprogramma-

ble position, polarity, and width, the ADV7614 provides the

following:

•

Programmableinterrupt request outputpins: INT1 and INT2

•

Low power consumption: 1.8 V digital core, 3.3 V digital

input/output, low powerpower-down mode, and green

PC mode

•

15 mm × 15 mm, RoHS-compliant BGA package

For more detailed product information about the ADV7614,

contact a local Analog Devices, Inc., sales office.

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