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TAS5076 Datasheet(PDF) 32 Page - Texas Instruments |
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TAS5076 Datasheet(HTML) 32 Page - Texas Instruments |
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32 / 64 page ![]() Serial Control Interface Register Definitions 27 SLES090A—November 2003—Revised January 2004 TAS5076 3 Serial Control Interface Register Definitions Table 3−1 shows the register map for the TAS5076. Default values in this section are in bold. Table 3−1. I2C Register Map ADDR HEX DESCRIPTION 00 General status register 01 Error status register 02 System control register 0 03 System control register 1 04 Error recovery register 05 Automute delay 06 Dc-offset control register channel 1 07 Dc-offset control register channel 2 08 Dc-offset control register channel 3 09 Dc-offset control register channel 4 0A Dc-offset control register channel 5 0B Dc-offset control register channel 6 0C Interchannel delay register channel 1 0D Interchannel delay register channel 2 0E Interchannel delay register channel 3 0F Interchannel delay register channel 4 10 Interchannel delay register channel 5 11 Interchannel delay register channel 6 12 ABD delay register 13 Volume control register channel 1 14 Volume control register channel 2 15 Volume control register channel 3 16 Volume control register channel 4 17 Volume control register channel 5 18 Volume control register channel 6 19 Individual channel mute The volume table is contained in Appendix A. Default values are shown in bold in the following tables. 3.1 General Status Register (0x00) Table 3−2. General Status Register (Read Only) D7 D6 D5 D4 D3 D2 D1 D0 FUNCTION 0 − − − − − − − No volume update is in progress. 1 − − − − − − − Volume update is in progress. − 0 − − − − − − Always 0 − − 0 0 0 0 0 − Device identification code − − − − − − − 0 Any valid signal is inactive (see status register, 0x03) (see Note 1). − − − − − − − 1 No internal errors (all valid signals are high) NOTE 1: This bit is reset automatically when one or more channels are active. |
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