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TMS320F240 Datasheet(PDF) 21 Page - Texas Instruments |
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TMS320F240 Datasheet(HTML) 21 Page - Texas Instruments |
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21 / 105 page ![]() TMS320F240 DSP CONTROLLER SPRS042E – OCTOBER 1996 – REVISED NOVEMBER 2002 21 POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251–1443 hardware-generated interrupts (continued) IACK1 IRQ1 IACK5 IRQ5 IACK6 IRQ6 NMI INT1 INT6 System-Module External Interrupt NMI To DSP INT6 To DSP INT1 To DSP NMI NC = No connection IACK = interrupt acknowledge IRQ = interrupt request Legend: System-Module External Interrupt XINT1 (high priority) System-Module External Interrupt XINT2 (high priority) System-Module External Interrupt XINT3 (high priority) SPI Interrupt (high priority) SCI Receiver Interrupt (low priority) SPI Interrupt (low priority) System-Module External Interrupt XINT1 (low priority) System-Module External Interrupt XINT2 (low priority) System-Module External Interrupt XINT3 (low priority) Dual ADC Interrupt IACK_NMI IRQ_NMI IACK2 IRQ2 IACK3 IRQ3 IACK4 IRQ4 NC NC NC NC NC NC INT5 To DSP INT5 INT2 INT3 INT4 NC NC NC SCI Transmitter Interrupt (high priority) SCI Transmitter Interrupt (low priority) SCI Receiver Interrupt (high priority) Watchdog Timer Interrupt System Module Figure 6. System Module Interrupt Structure |
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