EP2C50 datasheet(52/168 Pages) ALTERA

Part #	EP2C50

Description	Section I. Cyclone II Device Family Data Sheet

PDF	168 Pages

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Manufacturer	ALTERA [Altera Corporation]

Direct Link	http://www.altera.com

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52 / 168 page

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Altera Corporation

Cyclone II Device Handbook, Volume 1

February 2007

I/O Structure & Features

Figure 2–22. Column I/O Block Connection to the Interconnect

Notes to Figure 2–22:

(1)

The 28 data and control signals consist of four data out lines, io_dataout[3..0], four output enables,

io_coe[3..0]

, four input clock enables, io_cce_in[3..0], four output clock enables, io_cce_out[3..0],

four clocks, io_cclk[3..0], four asynchronous clear signals, io_caclr[3..0], and four synchronous clear

signals, io_csclr[3..0].

(2)

Each of the four IOEs in the column I/O block can have two io_datain (combinational or registered) inputs.

28 Data &

Control Signals

from Logic Array (1)

Column I/O

Block Contains

up to Four IOEs

I/O Block

Local Interconnect

io_datain0[3..0]

io_datain1[3..0] (2)

R4 & R24 Interconnects

LAB Local

Interconnect

C4 & C24 Interconnects

LAB

io_clk[5..0]

Column I/O Block

EP2C50 Datasheet(PDF) 52 Page - Altera Corporation