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AS3675 Datasheet(PDF) 72 Page - ams AG |
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AS3675 Datasheet(HTML) 72 Page - ams AG |
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72 / 81 page ![]() www.austriamicrosystems.com/AS3675 1v3 71 - 80 AS3675 Datasheet - D e ta i l e d D e s c r i p t i o n Random Read and Sequential Read are combined formats. The repeated START condition is used to change the direction after the data transfer from the master. The word address transfer is initiated with a START condition issued by the master while the bus is idle. The START condition is followed by the device-write address and the word address. In order to change the data direction a repeated START condition is issued on the 1st CLKpulse after the ACKNOWL- EDGE bit of the word address transfer. After the reception of the device-read address, the slave becomes the transmit- ter. In this state the slave transmits register data located by the previous received word address vector. The master responds to the data byte with a NOT ACKNOWLEDGE, and issues a STOP condition on the bus. Figure 39. Serial Interface Sequential Read Sequential Read is the extended form of Random Read, as multiple register-data bytes are subsequently transferred. In contrast to the Random Read, in a sequential read the transferred register-data bytes are responded by an acknowl- edge from the master. The number of data bytes transferred in one sequence is unlimited (consider the behavior of the word-address counter). To terminate the transmission the master has to send a NOT ACKNOWLEDGE following the last data byte and subsequently generate the STOP condition. Figure 40. Serial Interface Current Address Read To keep the access time as small as possible, this format allows a read access without the word address transfer in advance to the data transfer. The bus is idle and the master issues a START condition followed by the Device-Read address. Analogous to Random Read, a single byte transfer is terminated with a NOT ACKNOWLEDGE after the 1st register byte. Analogous to Sequential Read an unlimited number of data bytes can be transferred, where the data bytes must be responded to with an ACKNOWLEDGE from the master. For termination of the transmission the master sends a NOT ACKNOWLEDGE following the last data byte and a sub- sequent STOP condition. 8.12 Operating Modes If the voltage on CLK and DATA is less than 1V (for > tPOR_DEB), the AS3675 is in shutdown mode and its current con- sumption is minimized (IBAT = ISHUTDOWN) and all internal registers are reset to their default values. If the voltage at CLK or DATA rises above 1V, the AS3675 serial interface is enabled and the AS3675 and the standby mode is selected. The AS3675 is switched automatically from standby mode (IBAT = ISTANBY) into normal mode (IBAT = IACTIVE) and back, if one of the following blocks are activated: Charge pump Step up regulator Any current sink ADC conversion started PWM active Pattern mode active. If any of these blocks are already switched on the internal oscillator is running and a write instruction to the registers is directly evaluated within 1 internal CLK cycle (typ. 1µs) S DW A WA A Sr DR A data 1 A data 2 AS3675 (= slave) receives data AS3675 (= slave) transmits data ... A data n N P Read Register WA++ S DR A data 1 A data 2 … A data n N P Read Register WA++ Read Register WA++ Read Register WA++ Read Register WA++ AS3675 (= slave) receives data AS3675 (= slave) transmits data |
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