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AS3675

Datasheet - D e ta i l e d D e s c r i p t i o n

8.7

Analog-to-Digital Converter

The AS3675 has a built-in 10-bit successive approximation analog-to-digital converter (ADC). It is internally supplied

by V2_5, which is also the full-scale input range (0V defines the ADC zero-code). For input signals exceeding V2_5

(typ. 2.5V) a resistor divider with a gain of 0.4 (Ratioprescaler) is used to scale the input of the ADC converter. Conse-

quently the resolution is:

The junction temperature (TJUNCTION) can be calculated with the following formula (ADCTEMP_CODE is the adc conver-

sion result for channel 04h selected by register adc_select = 000100b):

TJUNCTION [

°C] = ADCTOFFSET - ADCTC · ADCTEMP_CODE

(EQ 5)

Table 76. ADC Input Ranges, Compliances and Resolution

Channels (Pins)

Input Range

VLSB

Note

DCDC_FB, GPIO, AUDIO_IN, VANA/

GPI, audio controlled LED buffer

output

0V-2.5V

2.44mV

VLSB=2.5/1024

ADCTEMP_CODE

-30°C to 125°C

1 / ADCTC

junction temperature

CURR30-33, CURR4x, RGBx

VBAT, CPOUT

0V-5.5V

6.1mV

VLSB=2.5/1024 * 1/0.4; internal

resistor divider used

CURR1, CURR2, CURR6

0V-1.0V

2.44mV

VLSB=2.5/1024

Table 77. ADC Parameters

Symbol

Parameter

Condition

Min

Typ

Max

Unit

Resolution

Bit

VIN

Input Voltage Range

VSUPPLY = V2_5

VSS

see

Table

DNL

Differential Non-

Linearity

± 0.25

LSB

INL

Integral Non-Linearity

± 0.5

LSB

Vos

Input Offset Voltage

± 0.25

LSB

Rin

Input Impedance

100

Cin

Input Capacitance

VSUPPLY

(V2_5)

Power Supply Range

± 2%, internally trimmed.

2.5

Idd

Power Supply Current

During conversion only.

500

µ A

Idd

Power Down Current

100

TTOL

Temperature Sensor

Accuracy

@ 25

°C-10

+10

°C

ADCTOFFSET

ADC temperature

measurement offset

value

375

°C

ADCTC

Code temperature

coefficient

Temperature change per ADC LSB

1.293

°C/

Code

RatioPRESCALE

Ratio of Prescaler

For all low voltage current sinks, CPOUT

and VBAT

0.4

Transient Parameters (2.5V, 25 ºC)

Conversion Time

All signals are internally generated and

triggered by start_conversion

µs

Clock Frequency

1.0

MHz

Settling Time of S&H

µs

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