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AS8222 Datasheet(PDF) 18 Page - ams AG |
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AS8222 Datasheet(HTML) 18 Page - ams AG |
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18 / 43 page  AS8222 Datasheet - Electrical Character i s t ics www.ams.com/eng/FlexRay/AS8222 Revision 1.0 17 - 42 6.11 Host Interface Table 13. Host Interface Symbol Parameter Conditions Min Typ Max Units VSTBNIH uVDIG-IN-HIGH Threshold for detecting STBN as on logical high Threshold for detecting a digital input as on logical high 0.48 * VIO 0.7 * VIO 0.7 × uVDIG V VSTBNIL uVDIG-IN-LOW Threshold for detecting STBN as on logical low Threshold for detecting a digital input as on logical low 0.3 * VIO 0.3 × uVDIG 0.48 * VIO V ISTBNIH STBN high level input current 20 50 100 µA ISTBNIL STBN low level input current -5 0 5 µA tSTBN_DEB_LP STBN de-bouncing time low-power modes 0.1 1 40 µs tSTBN_DEB_NLP STBN de-bouncing time non-low- power modes 0.1 1 2 µs VENIH uVDIG-IN-HIGH Threshold for detecting EN as on logical high Threshold for detecting a digital input as on logical high 0.48 * VIO 0.7 * VIO 0.7 × uVDIG V VENIL uVDIG-IN-LOW Threshold for detecting EN as on logical low Threshold for detecting a digital input as on logical low 0.3 * VIO 0.3 × uVDIG 0.48 * VIO V IENIH EN high level input current 20 50 100 µA IENIL EN low level input current -5 0 5 µA tEN_DEB_LP EN de-bouncing time low-power modes 0.1 1 40 µs tEN_DEB_NLP EN de-bouncing time non-low-power modes 0.1 1 2 µs VERRNOH uVDIG-OUT- HIGH ERRN high level output voltage Output voltage on a digital output, when in logical high state IERRN =-4mA, VIO=5V 0.8 * VIO 0.8 × uVDIG 0.9 * VIO 1.0 * VIO 1.0 × uVDIG V VERRNOL uVDIG-OUT- LOW ERRN low level output voltage Output voltage on a digital output, when in logical low state IERRN =4mA, VIO=5V 00.1 * VIO 0.2 * VIO 0.2 × uVDIG V |
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