Ver1.0

17

LD1071

16 Channel Output LED Driver with 14 bit PWM Controller

WRITING THE DISPLAY DATA

With the 16 bit data, all output ports can be built with 16,384 gray scales. The 16-bit input shift register

latches 16 times of gray scale data into each data buffer with Display Data Write Command sequentially .

Finally Global Latch Command will load the 256 bit internal data buffers with LSB first into from output port

15( OUT15 ) to output port 0( OUT0 ). Even 16 bit display data for each port should be transferred, only 14

bits data are valid for gray scale image ( bit[13:0] ) and the high 2bits( bit[15:14] ) are reserved. For the detail

timing and sequence, refer to “Display Data Write Command” and “Global Latch Command” which is

described on page 14, please.

PWM DISPLAY CYCLE

The LD1071 implements the 14 bit gray level of each output port using the 4 PWM sub cycles. Each PWM

sub cycle is consisted of 12 bit PWMCK clocks. This enhancement provides a excellent energy

distribution in lighting the LED and increases the visual refresh rate and reduces the flickers.

D[15:14]

: Reserved

D[13:0]

: Display Data( 14 bit Gray Scale Data )

bit[13:2]

: 12bit PWM Comparing Data

bit[ 1: 0]

: PWM Insert data

1 1

: one pulse is inserted in 1st, 2nd and 3rd PWM Sub Cycle

1 0

: one pulse is inserted in 1st and 2nd PWM Sub Cycle

0 1

: one pulse is inserted in 1st PWM Sub Cycle

0 0

: Not inserted

12bit PWM

4096 PWMCK clocks

1st PWM Sub Cycle

2nd PWM Sub Cycle

3rd PWM Sub Cycle

4th PWM Sub Cycle

12bit PWM

4096 PWMCK clocks

12bit PWM

4096 PWMCK clocks

12bit PWM

4096 PWMCK clocks

ON

OFF

ON

OFF

ON

OFF

ON

OFF

OUT[15:0]

1 PWM Cycle ( 14 bit PWM Display = 16384 PWMCK clocks = 4096 x 4 )