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IR21141SS Datasheet(PDF) 16 Page - International Rectifier

Part # IR21141SS
Description  HALF-BRIDGE GATE DRIVER IC
PDF  34 Pages
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Manufacturer  IRF [International Rectifier]
Direct Link  http://www.irf.com
Logo IRF - International Rectifier

IR21141SS Datasheet(HTML) 16 Page - International Rectifier

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IR21141/IR22141SSPbF
www.irf.com
© 2009 International Rectifier
16
Referred to the timing diagram of Fig. 17:
A.
When the input signals are on together the
outputs go off (anti-shoot through),
B.
The HO signal is on and the high side IGBT
desaturates, the HO turn off softly while the
SY_FLT stays low. When SY_FLT goes high
the FAULT/SD goes low. While in SSD, if LIN
goes up, LO does not change (freeze),
C.
When
FAULT/SD
is
latched
low
(see
FAULT/SD section) FLT_CLR can disable it
and the outputs go back to follow the inputs,
D.
The DSH goes high but this is not read
because HO is off,
E.
The LO signal is on and the low side IGBT
desaturates, the low side behaviour is the
same as described in point B,
F.
The DSL goes high but this is not read as LO
is off,
G. As point A (anti-shoot through).
Referred to the timing diagram Fig. 18:
A.
The device is in the hold state, regardless of
input variations. The hold state results as
SY_FLT is forced low externally,
B.
The device outputs go off by hard shutdown,
externally commanded. A through B is the
same sequence adopted by another IR2x14x
device in SSD procedure.
C.
Externally driven low FAULT/SD (shutdown
state) cannot be disabled by forcing FLT_CLR
(see FAULT/SD section),
D.
The FAULT/SD is released and the outputs go
back to follow the inputs,
E.
Externally driven low FAULT/SD: outputs go
off by hard shutdown (like point B),
F.
As point A and B but for the low side output.



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