RL78 datasheet(51/61 Pages) RENESAS

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RL78/G14

2. ELECTRICAL SPECIFICATIONS

R01DS0053EJ0100 Rev. 1.00

Page 51 of 97

Feb 21, 2012

Caution

The pins mounted depend on the product. Refer to 1.3.1 30-pin products to 1.3.10 100-pin products.

Remark

Unless specified otherwise, the characteristics of alternate-function pins are the same as those of the port pins.

(TA = -40 to +85

C, 1.6 V  EVDD0 = EVDD1  VDD  5.5 V, VSS = EVSS0 = EVSS1 = 0 V)

Items

Symbol

Conditions

MIN.

TYP.

MAX.

Unit

Input leakage

current, high

ILIH1

P00 to P06, P10 to P17, P30,

P31, P40 to P47, P50 to P57,

P64 to P67, P70 to P77,

P80 to P87, P100 to P102, P110,

P111, P120, P140 to P147

VI = EVDD0

A

ILIH2

P20 to P27, P137, P150 to P156,

RESET

VI = VDD

A

ILIH3

P121 to P124

(X1, X2, EXCLK, XT1, XT2,

EXCLKS)

VI = VDD

In input port or

external clock

input

A

In resonator

connection

A

Input leakage

current, low

ILIL1

P00 to P06, P10 to P17, P30,

P31, P40 to P47, P50 to P57,

P64 to P67, P70 to P77,

P80 to P87, P100 to P102, P110,

P111, P120, P140 to P147

VI = EVSS0

-1

A

ILIL2

P20 to P27, P137, P150 to P156,

RESET

VI = VSS

-1

A

ILIL3

P121 to P124

(X1, X2, EXCLK, XT1, XT2,

EXCLKS)

VI = VSS

In input port or

external clock

input

-1

A

In resonator

connection

-10

A

On-chip pll-up

resistance

P00 to P06, P10 to P17, P30,

P31, P40 to P47, P50 to P57,

P64 to P67, P70 to P77,

P80 to P87, P100 to P102, P110,

P111, P120, P140 to P147

VI = EVSS0, In input port

100



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