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CS22220 Datasheet(PDF) 33 Page - Cirrus Logic |
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CS22220 Datasheet(HTML) 33 Page - Cirrus Logic |
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33 / 34 page ![]() CS22220 Wireless PCMCIA Controller 33 of 34 DS557PP2 Rev. 3.0 www.cirrus.com Table 16. Radio MAC AC Timings – RFMD Modes Parameter Parameter Description Min Max Units tdBBRNW BBRNW output delay from falling BBSCLK 6.7 ns tdnBBCS nBBCS output delay from falling BBSCLK 110.79 ns tdBBSDX BBSDX output delay from falling BBSCLK 7.0 ns TsuBBSDX BBSDX setup to rising edge of BBSCLK 14.5 ns ThBBSDX BBSDX hold from rising edge of BBSCLK 0.0 ns tdTXD TXD output delay from rising TXCLK (SMAC Mode) 33.5 ns tdTXD TXD output delay from rising TXCLK (RMAC Mode) 15.4 ns TsuRXD RXD setuptorising edgeofRXCLK 1.0 ns ThRXD RXD hold from rising edge of RXCLK 1.8 ns TsuMDRDY MDRDY setup to falling edge of RXCLK 2 ns ThMDRDY MDRDY hold from falling edge of RXCLK 1 ns tdTXPEBB TXPEBB output delay from rising TXCLK 15.0 ns tdRXPEBB RXPEBB output delay from rising RXCLK 16.0 ns TsuTXRDY TXRDY setup to falling edge of TXCLK 6.5 ns ThTXRDY TXRDY hold from falling edge of TXCLK 0 ns Notes: 1. CCA signal is double synchronized to ARMCLKIN. 2. ARMCLK must be at least 4 times the TXCLK and RXCLK frequency. 3. TXD delay in 802.11b mode is the result of sampling the TXCLK with the ctlclk, therefore the maximum delay is equal to two ctlclk periods plus the flop-to-output delay. In this table, ctlclk is assumed to have a 13 ns period. 4. BBNCS output delay = [(1/ARMCLK freq)*ceiling(SER_CLK_DIV/2)] + 7ns, the specified value is based on ARMCLK of 77 Mhz and SER_CLK_DIV=8. Table 17. Package Specifications Symbol Parameter Value Units θ JC Junction-to-Case Thermal Resistance 2.5 °C/W θ JA Junction-to-Open Air Thermal Resistance 26.9 °C/W TJ_MAX Max Junction Temperature 105 °C Notes: 1. ARMCLK / MEMCLK = 77MHz |
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