CS4954 datasheet(46/56 Pages) CIRRUS

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CS4954 CS4955

DS278PP4

Filter Register 5

Address

×27

B_AMP

Read/Write

Default Value = 80h

Filter Register 6

Address

×28

Bright_Offsett

Read/Write

Default Value = 00h

Teletext Register 0

Address

×29

TTXHS

Read/Write

Default Value = A1h

Teletext Register 1

Address

×2A

TTXHD

Read/Write

Default Value = 02h

Bit Number

765

432

Bit Name

B_AMP

Default

100

000

Bit

Mnemonic

Function

7:0

B_AMP

Blue amplitude coefficient

Bit Number

765

432

Bit Name

BRIGHTNESS_OFFSET

Default

000

Bit

Mnemonic

Function

7:0

BRGHT_OFFSET

Brightness adjustment ( range: -128 to +127)

Bit Number

765

432

Bit Name

TTXHS

Default

101

000

Bit

Mnemonic

Function

7:0

TTXHS

Start of teletext request pulses or start of window

Bit Number

765

432

Bit Name

TTXHD

Default

000

Bit

Mnemonic

Function

7:0

TTXHD

If TTX_WINDOW = 0 then this register is used as the Pipeline delay between

TTXRQ and TTXDAT signal in the teletext source. User programmable delay step

of 37 ns per LSB.

If TTX_WINDOW = 1 then this register is used as the 8 LSBs of the teletext insertion

windows; the 3 MSBs are located in register 0×31. (register 0×31 bit 3)

CS4954 Datasheet(PDF) 46 Page - Cirrus Logic

CS4954 Datasheet(HTML) 46 Page - Cirrus Logic

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